| Conference Papers |
| Byte-addressable NVRAM |
 | A. Kolli, J. Rosen, S. Diestelhorst, A. Saidi, S. Pelley, S. Liu, P. M. Chen, T. F. Wenisch.
Delegated Persist Ordering.
Proc. International Symposium on Microarchitecture (MICRO), Oct. 2016. |
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| | A. Kolli, S. Pelley, A. Saidi, P. M. Chen, T. F. Wenisch.
High-Performance Transactions for Persistent Memories.
Proc. of the 21st International Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2016. |
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| | S. Pelley, T. F. Wenisch, B. T. Gold and B. Bridge.
Storage Management in the NVRAM Era.
Proc. of the Very Large Database Endowment (VLDB), Sep. 2014. |
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| | S. Pelley, P. M. Chen, and T. F. Wenisch.
Memory Persistency.
Proc. of the 41st International Symposium on Computer Architecture (ISCA), Jun. 2014. |
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| Accelerators for Text Processing |
| | V. Gogte, A. Kolli, M. J. Cafarella, L. DAntoni, T. F. Wenisch..
HARE: Hardware acceleration for regular expression matching..
Proc. International Symposium on Microarchitecture (MICRO), Oct 2016. |
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| | P. Tandon, F. Sleiman, M. J. Cafarella, T. F. Wenisch..
HAWK: Hardware Support for Unstructured Log Processing..
Proc. 32nd IEEE International Conference on Data Engineering (ICDE), May 2016. |
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| | P. Tandon, J. Chang, R. G. Dreslinski, V. Qazvinian, P. Ranganathan, T. F. Wenisch..
Hardware Acceleration for Similarity Measurement in Natural Language Processing.
Proc. of the International Conference on Low Power Electronic Design (ISLPED), Aug. 2013. |
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| Microarchitecture |
| | F. Sleiman and T. F. Wenisch.
Efficiently Scaling Out-of-Order Cores for Simultaneous Multithreading.
Proceedings of the International Symposium on Computer Architecture (ISCA), Jun. 2016. |
|---|
| | A. Lukefahr, S. Padmanabha, R. Das, R. G. Dreslinski, T. F. Wenisch, and S. Mahlke.
Heterogeneous Microarchitectures Trump Voltage Scaling for Low-Power Cores.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, Aug. 2014. |
|---|
| | A. Lukefahr, S. Padmanabha, R. Das, F. M. Sleiman, R. G. Dreslinski, T. F. Wenisch, and S. Mahlke.
Composite Cores: Pushing Heterogeneity into a Core.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Dec. 2012. |
|---|
| | F. M. Sleiman, R. G. Dreslinski, T. F. Wenisch.
Embedded Way Prediction for Large Last-Level Caches.
Proc. of the International Conf. on Computer Design (ICCD), Oct. 2012. |
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| Data Center-Scale Systems |
| | N. Agarwal, T. F. Wenisch.
Thermostat: Application-transparent Management for Two-tiered Main Memory.
Proc. of the 22nd International Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Apr. 2017. |
|---|
| | M. Chow, D. Meisner, J. Flinn, D. Peek, T. Wenisch.
The Mystery Machine: End-to-end performance analysis of large-scale Internet services.
Proceedings of the 11th USENIX Symposium on Operating Systems Design and Implementation (OSDI), Oct. 2014. |
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| Architectural Support for Medical Imaging |
| | M. Yang, R. Sampson, S. Wei, T. F. Wenisch, B. Fowlkes, O. Kripfgans and C. Chakrabarti..
High Volume Rate, High Resolution 3D Plane Wave Imaging.
Proc. of IEEE Int. Ultrasonics Symposium, Sep. 2014. |
|---|
| | R. Sampson, M. Yang, S. Wei, C. Chakrabarti, and T. F. Wenisch..
Sonic Millip3de with dynamic receive focusing and apodization optimization.
Proc. of IEEE Int. Ultrasonics Symposium, Jul. 2013. |
|---|
| | J. Rosen, J. Wu, J. Fessler, and T. F. Wenisch..
Iterative Helical CT Reconstruction in the Cloud for Ten Dollars in Five Minutes.
Proc. of the 2013 Meeting on Fully Three-Dimensional Image Reconstruction in Radiology and Nuclear Medicine, Feb. 2013. |
|---|
| | R. Sampson, M. Yang, S. Wei, C. Chakrabarti, and T. F. Wenisch..
Sonic Millip3De: A Massively Parallel 3D-Stacked Accelerator for 3D Ultrasound.
Proc. of the 19th International Symposium on High Performance Computer Architecture (HPCA) Best Paper Award, Feb. 2013. |
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| Computational Sprinting |
| | L. Shao, A. Raghavan, L. Emurian, M. Papaefthymiou, T. F. Wenisch, and M. M. K. Martin, K. P. Pipe.
On-chip Phase Change Heat Sinks Designed for Computational Sprinting.
Proc. of the 30th Annual Thermal Measurement, Modeling, and Management Symposium (SemiTherm), Mar. 2014. |
|---|
| | A. Raghavan, L. Emurian, L. Shao, M. Papaefthymiou, K. P. Pipe, T. F. Wenisch, and M. M. K. Martin.
Computational Sprinting on a Hardware/Software Testbed.
Proc. of the 18th International Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2013. |
|---|
| | A. Raghavan, Y. Luo, A. Chandawalla, M. Papaefthymiou, K. P. Pipe, T. F. Wenisch, and M. M. K. Martin.
Computational Sprinting.
Proc. of the 18th International Symposium on High Performance Computer Architecture (HPCA) Best Paper Award, Feb. 2012. |
|---|
| | A. Gutierrez, R. G. Dreslinski, T. F. Wenisch, T. Mudge, A. Saidi, C. Emmons, N. Paver.
Full-System Analysis and Characterization of Interactive Smartphone Applications.
Proc. of the IEEE International Symposium on Workload Characterization (IISWC), Nov. 2011. |
|---|
| Server & Data Center Energy Efficiency |
| | K. Lim, D. Meisner, A. Saidi, P. Ranganathan, and T. F. Wenisch.
Thin Servers with Smart Pipes: Designing SoC Accelerators for Memcached.
Proc., of the 40th International Symposium on Computer Architecture (ISCA), Jun. 2013. |
|---|
| | Q. Deng, D. Meisner, A. Bhattacharjee, T. F. Wenisch, and R. Bianchini.
CoScale: Coordinating CPU and Memory System DVFS in Server Systems.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Dec. 2012. |
|---|
| | Q. Deng, D. Meisner, A. Bhattacharjee, T. F. Wenisch, and R. Bianchini.
MultiScale: Memory System DVFS with Multiple Memory Controllers.
Proc. of the International Conference on Low Power Electronic Design (ISLPED), Aug. 2012. |
|---|
| | D. Meisner, and T. F. Wenisch.
DreamWeaver: Architectural Support for Deep Sleep.
Proc. of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2012. |
|---|
| | K. Lim, Y. Turner, J. R. Santos, A. AuYoung, J. Chang, P. Ranganathan, T. F. Wenisch.
System-level Implications of Disaggregated Memory.
Proc. of the 18th International Symposium on High Performance Computer Architecture (HPCA), Feb. 2012. |
|---|
| | D. Meisner, T. F. Wenisch.
Does Low-power Design Imply Energy Efficiency for Data Centers?.
Proc. of the International Conference on Low Power Electronic Design (ISLPED), Aug. 2011. |
|---|
| | D. Meisner, C. Sadler, L. Barroso, W-D. Weber, T. F. Wenisch.
Power Management of On-line Data Intensive Services.
Proc., of the 38th International Symposium on Computer Architecture (ISCA), Jun. 2011. |
|---|
| | Q. Deng, D. Meisner, L. Ramos, T. F. Wenisch, and R.Bianchini.
MemScale: Active Low-Power Modes for Main Memory.
Proc. of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2011. |
|---|
| | David Meisner, and Thomas F. Wenisch.
Peak Power Modeling for Data Center Servers with Switched-Mode Power Supplies.
Proc. of the International Conference on Low Power Electronic Design (ISLPED), Aug. 2010. |
|---|
| | Steven Pelley, David Meisner, Pooya Zandevakili, Thomas F. Wenisch, and Jack Underwood.
Power Routing: Dynamic Power Provisioning in the Data Center.
Proc. of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2010. |
|---|
| | Kevin Lim, Jichuan Chang, Trevor Mudge, Parthasarathy Ranganathan, Steven K. Reinhardt, Thomas F. Wenisch.
Disaggregated Memory for Expansion and Sharing in Blade Servers.
Proc. of the 36th International Symposium on Computer Architecture (ISCA), Jun. 2009. |
|---|
| | David Meisner, Brian T. Gold, and Thomas F. Wenisch.
PowerNap: Eliminating Server Idle Power.
Proc. of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar. 2009. |
|---|
| Performance Evaluation Methodology |
| | A. Hansson, N. Agarwal, A. Kolli, A. N. Udipi, T. F. Wenisch.
Simulating DRAM controllers for future system architecture exploration.
Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS), Mar. 2014. |
|---|
| | D. Meisner, J. Wu, T. F. Wenisch.
BigHouse: A simulation infrastructure for data center systems.
Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS) Best Paper Award, Apr. 2012. |
|---|
| | D. Meisner, J. Wu, T. F. Wenisch.
Towards a Scalable Data Center-level Evaluation Methodology.
Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS) (short paper), Apr. 2011. |
|---|
| | Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi and James C. Hoe.
Simulation Sampling with Live-Points.
Proc. of the International Symposium on Performance Analysis of Systems and Software (ISPASS), Mar. 2006. |
|---|
| | Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi and James C. Hoe.
TurboSMARTS: Accurate Microarchitecture Simulation Sampling in Minutes.
International Conference on Measurement & Modeling of Computer Systems (SIGMETRICS), (short paper) Jun. 2005. |
|---|
| | R. Wunderlich, T. Wenisch, B. Falsafi, and J. Hoe.
SMARTS - Accelerating Microarchitecure Simulation via Rigorous Statistical Sampling.
Proc. of the 30th International Symposium on Computer Architecture (ISCA), (short paper) Jun. 2003. |
|---|
| Multiprocessor Programmability |
| | Colin Blundell, Milo M. K. Martin, Thomas F. Wenisch.
InvisiFence: Performance-Transparent Memory Ordering in Conventional Multiprocessors.
Proc. of the 36th International Symposium on Computer Architecture (ISCA), Jun. 2009. |
|---|
| | Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi and Andreas Moshovos.
Mechanisms for Store-wait-free Multiprocessors.
Proc. of the 34th International Symposium on Computer Architecture (ISCA), Jun. 2007. |
|---|
| Memory Streaming |
| | A. Kolli, A. Saidi, T. F. Wenisch.
RDIP: Return-address-stack directed instruction prefetching.
Proc. of the 46th Annual International Symp. on Microarchitecture (MICRO), Dec. 2013. |
|---|
| | Stephen Somogyi, Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi.
Spatio-Temporal Memory Streaming.
Proc. of the 36th International Symposium on Computer Architecture (ISCA), Jun. 2009. |
|---|
| | Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi and Andreas Moshovos.
Practical Off-chip Meta-data for Temporal Memory Streaming.
Proc. of the 15th International Symposium on High Performance Computer Architecture (HPCA) , Feb. 2009. |
|---|
| | Michael Ferdman, Thomas F. Wenisch, Anastasia Ailamaki, Babak Falsafi and Andreas Moshovos.
Temporal Instruction Fetch Streaming.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Nov. 2008. |
|---|
| | Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi and Andreas Moshovos.
Temporal Streams in Commercial Server Applications.
Proc. of the IEEE International Symposium on Workload Characterization (IISWC), Sep. 2008. |
|---|
| | Stephen Somogyi, Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi and Andreas Moshovos.
Spatial Memory Streaming.
Proc. of the 33rd International Symposium on Computer Architecture (ISCA), Jun. 2006. |
|---|
| | Thomas F. Wenisch, Stephen Somogyi, Nikolaos Hardavellas,Jangwoo Kim, Chris Gniady, Anastassia Ailamaki, and Babak Falsafi.
Store-Ordered Streaming of Shared Memory.
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT), Sep. 2005. |
|---|
| | Thomas F. Wenisch, Stephen Somogyi, Nikolaos Hardavellas,Jangwoo Kim, Anastassia Ailamaki, and Babak Falsafi.
Temporal Streaming of Shared Memory.
Proc. of the 32nd Annual ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun 2005. |
|---|
| Information Theory |
| | T. Wenisch, P. F. Swaszek and A. K. Uht.
Combined Error Correcting and Compressing Codes.
Proc. of the IEEE International Symposium on Information Theory (ISIT), Jun. 2001. |
|---|
| Journals |
| | M. Yang, R. Sampson, S. Wei, T. F. Wenisch, and C. Chakrabarti.
Separable beamforming for 3-D medical ultrasound imaging.
IEEE Transactions on Signal Processing, V. 63, N. 2, Jan. 2015. |
|---|
| | M. Yang, R. Sampson, S. Wei, T. F. Wenisch, and C. Chakrabarti.
High frame rate 3-D ultrasound imaging using separable beamforming.
IEEE Journal of Signal Processing Systems (JSP), 2014. |
|---|
| | R. Sampson, M. Yang, S. Wei, C. Chakrabarti, and T. F. Wenisch.
Sonic Millip3de: An architecture for handheld 3D ultrasound.
IEEE MICRO Top Picks in Computer Architecture of 2013, vol. 34, no. 3, May/Jun. 2014. |
|---|
| | A. Raghavan, Y. Luo, A. Chandawalla, M. Papaefthymiou, K. P. Pipe, T. F. Wenisch, and M. M. K. Martin.
Utilizing Dark Silicon to Save Energy with Computational Sprinting.
IEEE MICRO Special Issue on Dark Silicon, vol. 33 no. 5, Sep/Oct. 2013. |
|---|
| | A. Raghavan, Y. Luo, A. Chandawalla, M. Papaefthymiou, K. P. Pipe, T. F. Wenisch, and M. M. K. Martin.
Designing for Responsiveness with Computational Sprinting.
IEEE MICRO Special Issue on Top Picks in Computer Architecture 2012, vol. 33 no. 3, May/Jun. 2013. |
|---|
| | T. F. Wenisch, and A. Buyuktosunoglu.
Energy-Aware Computing. (Guest Editors Introduction).
IEEE MICRO Special Issue on Energy Aware Computing, vol. 32 no. 5, Sep/Oct. 2012. |
|---|
| | K. Sewell, R. G. Dreslinski, T. Manville, S. Satpathy, N. Pinckney, G. Blake, M. Cieslak, R. Das, T. F. Wenisch, D. Sylvester, D. Blaauw, and T. Mudge.
2D and 3D Swizzle-Switch Network Design.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol. 2, no. 2, Jun. 2012. |
|---|
| | David Meisner, Brian T. Gold, and Thomas F. Wenisch.
The PowerNap Server Architecture.
ACM Transaction on Computer Systems, vol. 29, no. 1, Feb. 2011. |
|---|
| | S. Somogyi, T. F. Wenisch, M. Ferdman, B. Falsafi.
Spatial Memory Streaming.
Journal of Instruction-Level Parallelism (JILP), 13 (2011) 1-26. |
|---|
| | Thomas F. Wenisch, Michael Ferdman, Anastassia Ailamaki, Babak Falsafi, and Andreas Moshovos.
Making Address-correlated Prefetching Practical.
IEEE MICRO Top Picks in Computer Architecture of 2009, vol. 30, no. 1, Jan./Feb. 2010. |
|---|
| | Thomas F. Wenisch, Roland E. Wunderlich, Michael Ferdman, Anastassia Ailamaki, Babak Falsafi, and James C. Hoe.
SimFlex: Statistical Sampling of Computer System Simulation.
IEEE MICRO Special Issue on Computer Architecture Simulation and Modeling, vol. 26, no. 4, Jul./Aug. 2006. |
|---|
| | Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, and James C. Hoe.
Statistical Sampling of Microarchitecture Simulation.
ACM Transactions on Modeling of Computer Systems (TOMACS), vol. 16, no. 3, Jul. 2006. |
|---|
| | Nikolaos Hardavellas, Stephen Somogyi, Thomas F. Wenisch, Roland E. Wunderlich, Shelley Chen, Jangwoo Kim, Babak Falsafi, James C. Hoe, and Andreas G. Nowatzyk.
SIMFLEX: A Fast, Accurate, Flexible Full-System Simulation Framework for Performance Evaluation of Server Architecture.
ACM SIGMETRICS Performance Evaluation Review, vol. 31, no. 4, Mar. 2004. |
|---|
| | A. K. Uht, D. Morano, A. Khalafi, M. de Alba, T. Wenisch, M. Ashouei and D. Kaeli.
Levo: IPC in the 10's via Resource Flow Computing.
IEEE Technical Committee on Computer Architecture Newsletter, Oct. 2001. |
|---|
| Workshop Papers |
| | S. Wei, M. Yang, R. Sampson, T. F. Wenisch, B. Fowlkes, O. Kripfgans and C. Chakrabarti..
A Low Complexity Scheme for Accurate 3D Velocity Estimation in Ultrasound Systems.
Proc. of IEEE Workshop on Signal Processing Systems, (to appear) Oct. 2014. |
|---|
| | M. Yang, R. Sampson, T. F. Wenisch, and C. Chakrabarti..
Separable beamforming for 3-D synthetic aperture ultrasound imaging.
Proc. of IEEE Workshop on Signal Processing Systems, Oct. 2013. |
|---|
| | P. Tandon, M. J. Cafarella, T. F. Wenisch.
Minimizing Remote Accesses in MapReduce Clusters.
Proc. of the International Workshop on High Performance Data Intensive Computing (HPDIC), May 2013. |
|---|
| | P. Tandon, J. Chang, R. Dreslinski, P. Ranganathan, T. Mudge, T. F. Wenisch.
PicoServer Revisited: On the Profitability of Eliminating Intermediate Cache Levels.
Proc. of the Workshop on Duplicating, Deconstructing, and Debunking (WDDD), Jun. 2012. |
|---|
| | S. Pelley, T. F. Wenisch, and K. LeFevre.
Do Query Optimizers Need to be SSD-aware?.
Proc. of the Second International Workshop on Accelerating Data Management Systems using Modern Processor and Storage Architectures (ADMS’11), Sep. 2011. |
|---|
| | R. Sampson and T. F. Wenisch.
ZCache Skew-ered.
Proc. of the Workshop on Duplicating, Deconstructing, and Debunking (WDDD), Jun. 2011. |
|---|
| | David Meisner and Thomas F. Wenisch.
Stochastic Queuing Simulation for Data Center Workloads.
Proc. of the Workshop on Exascale Evaluation and Research Techniques (EXERT), Mar. 2010. |
|---|
| | Steven Pelley, David Meisner, Thomas F. Wenisch, and James W. VanGilder.
Understanding and Abstracting Total Data Center Power.
Proc. of the 2009 Workshop on Energy Efficient Design (WEED), Jun. 2009. |
|---|
| | Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, and James C. Hoe.
Statistical Sampling of Microarchitecture Simulation.
Proc. of the 2006 Workshop on the NSF Next Generation Software Program (NGS), Apr. 2006. |
|---|
| | Stephen Somogyi, Thomas F. Wenisch, Nikolaos Hardavellas, Jangwoo Kim, Anastassia Ailamaki, and Babak Falsafi.
Memory Coherence Activity Prediction in Commercial Workloads.
Proc. of the 3rd Annual Workshop on Memory Performance Issues (WMPI), Jun 2004. |
|---|
| | R. Wunderlich, T. Wenisch, B. Falsafi, and J. Hoe.
An Evaluation of Stratified Sampling of Microarchitecture Simulations.
Proc. of the 3rd Workshop on Duplicating, Deconstructing, and Debunking, Jun 2004. |
|---|
| Technical Reports |
| | Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi and James C. Hoe.
TurboSMARTS: Accurate Microarchitecture Simulation Sampling in Minutes.
CALCM TR 2004-3, Carnegie Mellon University, Nov. 2004. |
|---|
| | T. Wenisch and A. K. Uht.
HDLevo - VHDL Modeling of Levo Processor Components.
TR 072001-0100, Dept. of Electrical and Computer Engineering, University of Rhode Island, Jul. 2001. |
|---|
| Patents |
| | Thomas F. Wenisch, Stephen Berard, David J. Smith.
Computer Network Security System.
US Patent No. 7,100,054, Issued 8/29/2006. |
|---|
| | Thomas F. Wenisch.
Software-based Watchdog Method and Apparatus..
US Patent No. 7,162,714, Issued 1/9/2007. |
|---|
| | Christain Kuiawa, David Cardimino, Todd Giaquinto, Thomas Wenisch.
Uninterruptible Power Supply Management Network System.
US Patent Pending, Appl. No. 20030033548, Filed 8/9/2001. |
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