An Alpha-64 Out-of-Order Processor Design
Our team implemented a three-way superscalar alpha-64 out-of-order CPU. We are able to achieve 100MHz and IPC of 0.94 with Synopsys 90nm generic library for education under the constraint area requirements.
- Shadowclone: Thwarting and Detecting DOP Attacks with Stack Layout Randomization and Canary
- Deep Dive Into the Cost of Context Switch
- ThundaTag: Disparate Domain Tagging to Enforce Benign Program Behavior
- Understanding the Value of Ensemble of Moving Target Defenses in Morpheus
- PowerSpy Upgraded: Location Tracking using Mobile Device Power Analysis