Shibo Chen

PhD Candidate, Department of Electrical Engineering and Computer Science, University of Michigan.

About me

I am a PhD Candidate in the Department of Electrical Engineering and Computer Science at the University of Michigan. I am advised Prof.Todd Austin. I am a student in the Computer Engineering Laboratory(CELAB) at the University of Michigan. My field of study is computer system and architecture.

Research interests

Heterogeneous architecture design, agile hardware design, operating system, privacy-preserving architecture.

Education

2019 - May 2024 University of Michigan, Ann Arbor, MI

• Doctor of Philosophy in Computer Science and Engineering
• GPA: 3.91
• Proposed Dissrtation Thesis: Streamlining Heterogeneous Hardware Design

2022 - now University of Michigan, Ann Arbor, MI

• Graduate Certificate in Innovation & Entrepreneurship

2016 - 2019 University of Michigan, Ann Arbor, MI

• Bachelor of Science in Computer Science with High Distinction
• GPA: 3.92

Industry Experience

May 2023 - August 2023 Tenstorrent Inc., Santa Clara, CA

• Platform Architect Intern
• Estimated traffic on/off the chip for power analysis.
• Proposed and studied architecture changes that boost both multi-core performance and power efficiency.
• Drafted testplan for cache and fabric verification.
• Developed workflow for multi-core. multi-chiplet fabric traffic testing and simulation.
• Configured Arteris IP for non-conherent traffic.

May 2022 - August 2022 Tenstorrent Inc., Santa Clara, CA

• Platform Architect Intern
• Participated in the architectural design of a modern server-level RISC-V multicore CPU.
• Developed in-house reconfigurable fabric performance model for heterogeneous multicore systems.
• Designed configuration semantics to represent a wide range of farbric design options.

Teaching Experience

August 2023 - December 2023 University of Michigan, Ann Arbor, MI

• Graduate Student Instructor
• Taught and managed EECS470 Computer Architecture.
• Topics include out-of-order processors and speculation, memory hierarchies, branch prediction, virtual memory, cache design, multi-processors, and parallel processing including cache coherence and consistency. Emphasis on power and performance trade-offs. Groups design an advanced (e.g. out-of-order, multi-core, SMT) processor using an HDL.

Jan 2023 - April 2023 University of Michigan, Ann Arbor, MI

• Graduate Student Instructor
• Taught and managed EECS598-9 Privacy-enhancing Technologies (PETS).
• Topics include differential privacy, zero-knowledge proof, multi-party computation, oblivious computing, etc. Group develop research or engineering projects with PETS.
• Received perfect student ratings on the overall teaching quality (5.0/5.0).

Leadership

May 2022 - April 2023 Computer Science and Engineering Graduate Students at UM

• President and Social Chair
• Elected to represent over 450 CSE graduate students.
• Managed regular communications between department leadership and CSEG leasership.
• Planned and oversaw student lounge refurbishment.
• Organized student welcome events, regular tea time, Yost skating, and other social activities.
• Coordinated and supported officers to fulfill responsibilities and execute new initiatives.

Sept 2019 - April 2022 Discover-Self Mentoring Program(寻己)

• Cofounder and mentor
• Planned and cofounded the mentoring program.
• Mentored 13 UM freshmen and sophomore students over 1 year.
• Gave multiple presentations on career development.

Awards

2019 EECS Scholar

• Department of Electrical Engineering and Computer Science, University of Michgan, Ann Arbor, Michigan

2019 University Honors

• University of Michgan, Ann Arbor, Michigan

2018 James B. Angell Scholar

• University of Michgan, Ann Arbor, Michigan

2018 University Honors

• University of Michgan, Ann Arbor, Michigan

2017 University Honors

• University of Michgan, Ann Arbor, Michigan

Publications

2023 Security Verification of Low-Trust Architectures

• To Appear in The ACM Conference on Computer and Communications Security 2023 (CCS’23).
• Q. Tan*, Y. Fisseha*, S. Chen*, L. Biernacki, J.B. Jeannin, S. Malik, T. Austin.
• * These individuals contributed equally to the work.

2023 Zipper: Latency-Tolerant Optimizations for High-Performance Buses

• Under Submission
• S. Chen, H. Zhang, T. Austin.

2022 Twine A Chisel Extension for Component-Level Heterogeneous Design

• In Proceedings of Design, Automation and Test in Europe Conference 2022 (DATE’22, 25% Acceptance Rate)
• S. Chen, J. Fisseha, J.B. Jeannin, T. Austin.

2019 Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn

• In Proceedings of 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS ‘19).
• M. Gallagher, L. Biernacki, S. Chen, Z. Aweke, S. Yitbarek, M. Aga, A. Harris, Z. Xu, B. Kasikci, V. Bertacco, S. Malik, M. Tiwari, T. Austin.

2018 CommPact: Evaluating the Feasibility of Autonomous Vehicle Contracts

• In Proceedings of IEEE Vehicular Networking Conference 2018 (VNC ‘18).
• J. Erickson, S. Chen, M. Savich, S. Hu, M. Mao.

Technical Reports

2019 Shadowclone: Thwarting and Detecting DOP Attacks with Stack Layout Randomization and Canary

• Yunjie Pan, Shibo Chen, Cheng Chi, Yifan Guan
• In this project, we developed a compile-time randomization technique to thwart Data-Oriented Programming attacks. Furthermore, we utilize stack canary to detect ongoing attacks. Our results show that our approach has low performance overhead on programs with few function calls. We also show that it is practically hard for attackers to succeed even under our conservative assumptions.

Deep Dive Into the Cost of Context Switch

• Shibo Chen, Yu Wu, Xinyun Jiang, Wen-Jye Hu
• In this project, we identified the major components of the context swtich overhead on modern CPUs. We show that data cache misses and d-TLB misses are two major contributors of the overhead. Furthermore, we demonstrate that it requires a non-trivial effort to implement an user-level multithreading library.

2018 ThundaTag: Disparate Domain Tagging to Enforce Benign Program Behavior

• Alex Kisil, Shibo Chen
• In this project, we implemented and evaluated the architectural support for domain tagging. Our study shows that such design only requires negligible area overhead and induces low performance overhead.

2018 An Alpha-64 Out-of-Order Processor Design

• Shibo Chen, Zhen Feng, Chin-Wei Hsu, Yueying Li, Wenhao Peng
• Our team implemented a three-way superscalar alpha-64 out-of-order CPU. We are able to achieve 100MHz and IPC of 0.94 with Synopsys 90nm generic library for education under the constraint area requirements.

2018 Understanding the Value of Ensemble of Moving Target Defenses in Morpheus

• Shibo Chen
• In this work, we studied the average time needed to penetrate a de-featured Morpheus design. The result underscores the robustness of Morpheus defenses.

2018 PowerSpy Upgraded: Location Tracking using Mobile Device Power Analysis

• Shibo Chen, Shengtuo Hu
• In this work, we extended the original Powerspy paper to more environments. Our study shows the availability of attacker using this attack to conduct indoor tracking.

Research Occupation

Sept 2019 - Present Graduate Student Research Assistant

• University of Michigan, Ann Arbor, Michigan

Jun 2018 - Dec 2022 SRC Research Scholars

• SRC Research Scholars Program

May 2019 - August 2019 Research Assistant

• University of Michigan, Ann Arbor, Michigan

May 2018 - August 2018 Research Assistant

• University of Michigan, Ann Arbor, Michigan

Mentoring

Sept 2019 - April 2020 Mentor for Discover-Self Program

• University of Michigan, Ann Arbor, Michigan
• Mentored over 13 first-year UM undergraduate students on career development & research skills.

Sept 2022 - April 2023 Hailun(Shirley) Zhang

• Admitted to PhD program at University of Wisconsin - Madison.

Dec 2023 - Prsent Yunjie Zhang

• Junior Undergraduate, University of Michigan

Last updated: Sept 2023