Research Profile

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Recent publications

"High-Radix On-chip Networks with Low-Radix Routers"
Animesh Jain, Ritesh Parikh and Valeria Bertacco
International Conference on Computer-Aided Design (ICCAD), San Jose, CA, November 2014
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"DiAMOND: Distributed Alteration of Messages for On-Chip Network Debug"
Rawan Abdel-Khalek and Valeria Bertacco
International Symposium on Networks-on-Chip (NoCs), Ferrara, Italy, September 2014
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Best Paper Award Finalist
(2 finalists in conference)

"Brisk and Limited-Impact NoC Routing Reconfiguration"
Doowon Lee, Ritesh Parikh and Valeria Bertacco
Design Automation and Test in Europe (DATE), Dresden, Germany, March 2014
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"uDIREC: Unified Diagnosis and Reconfiguration for Frugal Bypass of NoC faults"
Ritesh Parikh and Valeria Bertacco
International Symposium on Microarchitecture (MICRO), Davis, CA, December 2013
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"Hybrid Checking for Microarchitectural Validation of Processor Designs on Acceleration Platforms"
Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv and Valeria Bertacco
International Conference on Computer-Aided Design (ICCAD), San Jose, CA, November 2013
PDF File

Publications

By forum:    Conference       Book chapters & Journal       Workshop

By topic:
Reliable system design
Post-silicon and Runtime validation
Acceleration and Validation
High performance NoC design
Security
Formal verification
Physical design optimization

Books

Post-Silicon and Runtime Verification for Modern Processors

Ilya Wagner and Valeria Bertacco
published by Springer, 2011.

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Functional Design Error in Digital Circuits

Kai-hui Chang, Igor Markov and Valeria Bertacco
published by Springer, 2008.

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Scalable Hardware Verification with Symbolic Simulation

Valeria Bertacco
published by Springer, 2005.

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Recent presentations

  • "Achieving Design Correctness (Finally!) with Runtime Checking" - 12/2013
  • "Making System-Level Lemonade Out of Hardware Lemons" - 05/2013
  • "Multi-core Processors: Will We Ever Get Them Right?" - 03/2013

Ph.D. Thesis

I completed my Ph.D. in Electrical Engineering at Stanford in 2003. My advisor was Kunle Olukotun. The title of my dissertation is "Achieving scalable hardware verification with symbolic simulation". For a high level overview of my PhD work, read this elevator talk.