A Microprocessor-based Hypercube Supercomputer

S. Colley, J. Palmer
nCUBE Corporation

J.P. Hayes, T.N. Mudge, Quentin F. Stout
EECS Department, University of Michigan

Winner, IEEE Micro ``Best Article'' award, 1986.


Abstract: This paper describes the nCUBE 1 parallel computer. It describes the processor (a single-chip custom microprocessor with integrated communication ports), system architecture, and system software (the operating system is based on Unix, and compilers are provided for Fortran and C). Processors are interconnected in a hypercube fashion, scaling up to a system of 1024 processors, and each processor can also be connected to an I/O device. The paper describes some of the considerations and trade-offs that led to this design, and includes some performance measurements.

Keywords: hypercube computer, supercomputing, store-and-forward message passing, I/O systems, parallel computer, computer architecture

Complete paper. The paper appeared in IEEE Micro 6 (1986), pp. 6-17, and was reprinted in in Multi-Microprocessors, A. Gupta, ed., IEEE Press, 1987, pp. 250-260.


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