Publications

These are my publications prior to joining the University of Michigan in reverse chronological order.  It includes journal, refereed conference and workshop, and a few technical reports that were only published in that form.  This work was done at the University of Illinois and Hewlett-Packard Laboratories from 1991 to 2001.  For more recent publications done at Michigan, see the CCCP website.

2002

• "PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators," Robert Schreiber, Shail Aditya, Scott Mahlke, Vinod Kathail, B. Ramakrishna Rau, Darren Cronquist, and Mukund Sivaraman, The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, Vol. 31, No. 2, Jun. 2002, pp. 127-142.  Also published as Hewlett-Packard Laboratories Technical Report, HPL-2001-249.

2001

• "Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators," Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, and Timothy Sherwood, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 20, No. 11, Nov. 2001, pp. 1355-1371.  Also published as Hewlett-Packard Laboratories Technical Report, HPL-2001-209.
• "Bitwidth Sensitive Code Generation in a Custom Embedded Accelerator Design System," Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, and Timothy Sherwood," Proceedings of the 5th International Workshop on Software and Compilers for Embedded Systems (SCOPES),  Mar. 2001.

2000

• "Code Size Minimization and Retargetable Assembly for Custom EPIC and VLIW Instruction Formats," Shail Aditya, Scott Mahlke, and B. Ramakrishna Rau, ACM Transactions on Design Automation of Electronic Systems, Vol. 5, No. 4, Oct. 2000, pp. 752-773.  Also published as Hewlett-Packard Laboratories Technical Report, HPL-2000-141.
• "High-Level Synthesis of Nonprogrammable Hardware Accelerators," Robert Schreiber, Shail Aditya, B. Ramakrishna Rau, Vinod Kathail, Scott Mahlke, Santosh Abraham, and Greg Snider, Proceedings of the 2000 IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP), Oct. 2000, pp. 113-126.  Also published as Hewlett-Packard Laboratories Technical Report, HPL-2000-31.

1999

• "Automatic and Efficient Evaluation of Memory Systems for Embedded Systems," Santosh Abraham and Scott Mahlke, Proceedings of the 32nd Annual International Symposium on Microarchitecture (MICRO), Nov. 1999, pp. 114-125.  Extended version published as Hewlett-Packard Laboratories Technical Report, HPL-1999-132.
• "The Partial Reverse If-Conversion Framework for Balancing Control Flow and Predication," David August, Wen-mei Hwu, and Scott Mahlke, International Journal of Parallel Programming, Vol. 27, No. 5, Oct. 1999, pp. 381-423.
• "An Automatic System for Application-Specific Instruction Format Design and Code Generation for VLIW and EPIC Processors," Shail Aditya, Scott Mahlke, and B. Ramakrishna Rau, Proceedings of the 4th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Sep. 1999.
• "Control CPR: A Branch Height Reduction Optimization for EPIC Architectures," Michael Schlansker, Scott Mahlke, and Richard Johnson, Proceedings of the ACM SIGPLAN 1999 Conference on Programming Language Design and Implementation (PLDI), Jun. 1999, pp. 155-168.  Also published as Hewlett-Packard Laboratories Technical Report, HPL-1999-34.
• "The Program Decision Logic Approach to Predicated Execution," David August, John Sias, Jean-Michel Puiatti, Scott Mahlke, Daniel Connors, Kevin Crozier, and Wen-mei Hwu, Proceedings of the 26th International Symposium on Computer Architecture (ISCA), May 1999, pp. 208-219.

1998

• "Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture," David August, Daniel Connors, Scott Mahlke, John Sias, Kevin Crozier, Ben-Chung Cheng, Patrick Eaton, Qudus Olaniran, and Wen-mei Hwu, Proceedings of the 25th International Symposium on Computer Architecture, Jul. 1998, pp. 227-237.

1997

• "A Framework for Balancing Control Flow and Predication," David August, Wen-mei Hwu, and Scott Mahlke, Proceedings of the 30th International Symposium on Microarchitecture (MICRO), Dec. 1997, pp. 92-103.
• "Exploiting Instruction-Level Parallelism in the Presence of Conditional Branches," Scott A. Mahlke, Ph.D. dissertation, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, Jan. 1997.

1996

• "Compiler Synthesized Dynamic Branch Prediction," Scott Mahlke and Balas Natarajan, Proceedings of the 29th Annual International Symposium on Microarchitecture (MICRO), Dec. 1996, pp. 153-163.
• "Achieving High Levels of Instruction-Level Paralellism with Reduced Hardware Complexity," Michael Schlansker, B. Ramakrishna Rau, Scott Mahlke, Vinod Kathail, Richard Johnson, Sadun Anik, and Santosh Abraham, Hewlett-Packard Laboratories Technical Report, HPL-96-120, Feb. 1996.

1995

• "Compiler Technology for Future Microprocessors," Wen-mei Hwu, Richard Hank, David Gallagher, Scott Mahlke, Daniel Lavery, Grant Haab, John Gyllenhaal, and David August, Proceedings of the IEEE, Vol. 83, No. 12, Dec. 1995, pp. 1625-1640.
• "A Comparison of Full and Partial Predicated Execution Support for ILP Processors," Scott Mahlke, Richard Hank, James McCormick, David August, and Wen-mei Hwu, Proceedings of the 22nd International Symposium on Computer Architecture (ISCA), Jun. 1995, pp. 138-149.
• "Three Architectural Models for Compiler-Controlled Speculative Execution," Pohua Chang, Nancy Warter, Scott Mahlke, William Chen, and Wen-mei Hwu, IEEE Transactions on Computers, Vol. 44, No. 4, Apr. 1995, pp. 481-494.
• "The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors," Pohua Chang, Daniel Lavery, Scott Mahlke, William Chen, and Wen-mei Hwu, IEEE Transactions on Computers, Vol. 44, No. 3, Mar. 1995, pp. 353-370.
• "Sentinel Scheduling with Recovery Blocks," David August, Brian Deitrich, and Scott Mahlke, Technical Report CRHC-95-05, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL, Feb. 1995.
• "A Study of the Effects of Compiler-Controlled Speculation on Instruction and Data Caches," Roger Bringmann, Scott Mahlke, and Wen-mei Hwu, Proceedings of the 28th Annual Hawaii Int'l Conference on System Sciences (HICSS), Jan. 1995, pp. 211-220.

1994

• "Characterizing the Impact of Predicated Execution on Branch Prediction," Scott. Mahlke, Richard Hank, Roger Bringmann, John Gyllenhaal, David Gallagher, and Wen-mei Hwu, Proceedings of the 27th International Symposium on Microarchitecture (MICRO), Dec. 1994, pp. 217-227.
• "Dynamic Memory Disambiguation Using the Memory Conflict Buffer," David Gallagher, William Chen, Scott Mahlke, John Gyllenhaal, and Wen-mei Hwu, Proceedings of the 6th International Conference on Architecture Support for Programming Languages and Operating Systems (ASPLOS), Oct. 1994, pp. 183-195.
• "Profile-Assisted Instruction Scheduling," William Chen, Scott Mahlke, Nancy Warter, Sadun Anik, and Wen-mei Hwu, International Journal of Parallel Programming, Vol. 22, No. 2, Apr. 1994, pp. 151-181.

1993

• "Superblock Formation Using Static Program Analysis," Richard Hank, Scott Mahlke, Roger Bringmann, John Gyllenhaal, and Wen-mei Hwu, Proceedings of the 26th Annual ACM/IEEE International Symposium on Microarchitecture (MICRO), Dec. 1993, pp. 247-256.
• "Speculative Execution Exception Recovery using Write-back Suppression," Roger Bringmann, Scott Mahlke, Richard Hank, John Gyllenhaal, and Wen-mei Hwu, Proceedings of the 26th Annual ACM/IEEE International Symposium on Microarchitecture (MICRO), Dec. 1993, pp. 214-223.
• "Sentinel Scheduling: A Model for Compiler-Controlled Speculative Execution," Scott Mahlke, William Chen, Roger Bringmann, Richard Hank, Wen-mei Hwu, B. Ramakrishna Rau, and Michael Schlansker, ACM Transactions on Computer Systems, Vol. 11, No. 4, Nov. 1993, pp. 376-408.
• "Using Profile Information to Assist Advanced Compiler Optimization and Scheduling," William Chen, Scott Mahlke, Nancy Warter, Richard Hank, Roger Bringmann, Sadun Anik, and Wen-mei Hwu, Advances in Languages and Compilers for Parallel Processing, U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua (editors), Pitman Publishing: London, 1993.
• "Reverse If-Conversion," Nancy Warter, Scott Mahlke, Wen-mei Hwu, and B. Ramakrishna Rau, Proceedings of the ACM SIGPLAN 1993 Conference on Programming Language Design and Implementation (PLDI), Jun. 1993, pp. 290-299.
• "Register Connection: A New Approach to Adding Registers into Instruction Set Architectures," Tokuzo Kiyohara, Scott Mahlke, William Chen, Roger Bringmann, Richard Hank, Sadun Anik, and Wen-mei Hwu, Proceedings of the 20th Annual International Symposium on Computer Architecture (ISCA), May 1993, pp. 247-256.
• "The Superblock: An Effective Technique for VLIW and Superscalar Compilation," Wen-mei Hwu, Scott Mahlke, William Chen, Pohua Chang, Nancy Warter, Roger Bringmann, Roland Ouellette, Richard Hank, Tokuzo Kiyohara, Grant Haab, John Holm, and Daniel Lavery, The Journal of Supercomputing, Kluwer Academic Publishers, Vol. 7, No. 1, Jan. 1993, pp. 229-248.

1992

• "Effective Compiler Support for Predicated Execution Using the Hyperblock," Scott Mahlke, David Lin, William Chen, Richard Hank, and Roger Bringmann, Proceedings of the 25th International Symposium on Microarchitecture (MICRO), Dec. 1992, pp. 45-54.  (Best paper award)
• "An Efficient Architecture for Loop Based Data Preloading," William Chen, Roger Bringmann, Scott Mahlke, Richard Hank, and James Sicolo, Proceedings of the 25th International Symposium on Microarchitecture (MICRO), Dec. 1992, pp. 92-101.
• "Compiler Code Transformations for Superscalar-Based High-Performance Systems," Scott Mahlke, William Chen, John Gyllenhaal, Wen-mei Hwu, Pohua Chang, and Tokuzo Kiyohara, Proceedings of Supercomputing '92, Nov. 1992, pp. 808-817.
• "Sentinel Scheduling for VLIW and Superscalar Processors," Scott Mahlke, William Chen, Wen-mei Hwu, B. Ramakrishna Rau, and Michael Schlansker, Proceedings of the Fifth International Conference on Architecture Support for Programming Languages and Operating Systems (ASPLOS), Oct. 1992, pp. 238-247.  (Best paper award)
• "Tolerating First Level Memory Access Latency In High-Performance Systems," William Chen, Scott Mahlke, and Wen-mei Hwu, Proceedings of the 21st Annual International Conference on Parallel Processing (ICPP), Aug. 1992, pp. 36-43.
• "Tolerating Data Access Latency with Register Preloading," William Chen, Scott Mahlke, and Wen-mei Hwu, Proceedings of the 1992 International Conference on Supercomputing, Jul. 1992, pp. 104-113.
• "Design and Implementation of a Portable Global Code Optimizer," Scott Mahlke, M.S. thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, May 1992.
• "Profile-Guided Automatic Inline Expansion for C Programs," Pohua Chang, Scott Mahlke, William Chen, and Wen-mei Hwu, Software Practice and Experience, May 1992, Vol. 22, No. 5, pp. 349-369.
• "Scalar Program Performance on Multiple-Instruction-Issue Processors with a Limited Number of Registers," Scott Mahlke, William Chen, Pohua Chang, and Wen-mei Hwu, Proceedings of the 25th Annual Hawaii International Conference on System Sciences (HICSS), Jan. 1992, pp. 34-44.

1991

• "Using Profile Information to Assist Classic Compiler Code Optimizations," Pohua Chang, Scott Mahlke, and Wen-mei Hwu, Software Practice and Experience, Dec. 1991, Vol. 21, No. 12, pp. 1301-1321.
• "Data Access Microarchitectures for Superscalar Processor with Compiler-Assisted Data Prefetching," William Chen, Scott Mahlke, Pohua Chang, and Wen-mei Hwu, Proceedings of the 24th Annual ACM/IEEE International Symposium on Microarchitecture (MICRO), Nov. 1991, pp. 69-73.
• "Comparing Static And Dynamic Code Scheduling for Multiple-Instruction-Issue Processors," Pohua Chang, William Chen, Scott Mahlke, and Wen-mei Hwu, Proceedings of the 24th Annual ACM/IEEE International Symposium on Microarchitecture (MICRO), Nov. 1991, pp. 25-33.  (Best paper award)
• "The Effect of Compiler Optimizations On Available Parallelism In Scalar Programs," Scott Mahlke, Nancy Warter, William Chen, Pohua Chang, and Wen-mei Hwu, Proceedings of the 20th Annual International Conference on Parallel Processing (ICPP), Aug. 1991, pp. 142-145.
• "IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors," Pohua Chang, Scott Mahlke, William Chen, Nancy Warter, and Wen-mei Hwu, Proceedings of the 18th Annual International Symposium on Computer Architecture (ISCA), May 1991, pp. 266-275.  (Received ISCA Most Influential Paper Award in 2006)