Current Temperature Stress Study of Amorphous In-Ga-Zn-O Thin Film Transistors
Charlene Chen and Jerzy Kanicki
The thin-film transistor (TFT) long term reliability is a critical issue, especially in certain applications such as AM-OLEDs, where the drive TFT constantly supplies a current to the organic light-emitting diode (OLED) instead of just acting like a switch.
In this project we study the electrical stability of a-IGZO TFTs by performing current temperature stress (CTS) measurements, and investigate factors affecting the CTS including stress time, stress current, stress temperature, and TFT biasing conditions. We observed that the threshold voltage shift (ΔVT) follows a power-law relationship with tSTR and ISTR, and that maintaining a lower temperature and smaller VGS is beneficial to the TFT’s electrical stability. We also found that for the same level of ID, the TFTs are more stable when operating in the saturation regime then in the linear regime. The a-IGZO TFTs exhibit ΔVT ~1V under 10000s stress with ISTR = 100μA, and TSTR = 60°C. The subthreshold slope, off-current, and field- effect mobility remain almost unchanged during the stress. The stretched-exponential model modified for CTS describes very well ΔVT as a function of tSTR, TSTR, and ISTR, suggesting that charge trapping near interface or in gate dielectric is at the origin of the a-IGZO TFT electrical instability. This work was supported by Canon Corp., Japan.
C. Chen et al., Journal of the SID, 17/6 (2009) 525.
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