Electrical Performance and Stability of Advanced Amorphous Silicon Thin-Film Transistor for AM-OLED’s
Alex Kuo, Tae Kyung Won, and Jerzy Kanicki
We fabricated and characterized advanced amorphous silicon thin-film transistor with both channel and gate dielectric bi-layers. We find that electrical field across the gate insulator has significant influence on the device threshold voltage electrical stability. We show that a high thin-film transistor (TFT) stability can be achieved even under the presence of a high channel current. Its electrical and high temperature stability improves up to factor of six when the TFT biasing conditions change from linear to saturation regime. Our a-Si:H TFT, which has a relatively small W/L ratio, can withstand up to 5.5μA of stress current for 10000sec at 353K and still suffers a ΔVT of less than 4V. The transistors operating in saturation regime undergo less threshold voltage shift during electrical stressing than the same transistors operating in the linear regime. This trend was observed in both current temperature stress (CTS) and bias temperature stress (BTS) experiments. Changing the operating condition of a-Si:H from linear to saturation regime in a pixel electrode circuit alone can achieve a factor of five improvements in circuit electrical stability. This technique can improve the stability of TFT regardless of its electrical performance and quality because it does not require making any fundamental changes to the TFT. We simulated the impact of this threshold voltage shift on an AM-OLED circuit and found that the resulting degradation in OLED current is less than 10%. This project is funded by AKT America Inc.
A. Kuo, and J. Kanicki, Digest of Am-FPD 2006, pp. 39-42, 2006.
We fabricated and characterized advanced amorphous silicon thin-film transistor with both channel and gate dielectric bi-layers. We find that electrical field across the gate insulator has significant influence on the device threshold voltage electrical stability. We show that a high thin-film transistor (TFT) stability can be achieved even under the presence of a high channel current. Its electrical and high temperature stability improves up to factor of six when the TFT biasing conditions change from linear to saturation regime. Our a-Si:H TFT, which has a relatively small W/L ratio, can withstand up to 5.5μA of stress current for 10000sec at 353K and still suffers a ΔVT of less than 4V. The transistors operating in saturation regime undergo less threshold voltage shift during electrical stressing than the same transistors operating in the linear regime. This trend was observed in both current temperature stress (CTS) and bias temperature stress (BTS) experiments. Changing the operating condition of a-Si:H from linear to saturation regime in a pixel electrode circuit alone can achieve a factor of five improvements in circuit electrical stability. This technique can improve the stability of TFT regardless of its electrical performance and quality because it does not require making any fundamental changes to the TFT. We simulated the impact of this threshold voltage shift on an AM-OLED circuit and found that the resulting degradation in OLED current is less than 10%. This project is funded by AKT America Inc.