Publications

Subhankar Pal, Kuba Kaszyk, Siying Feng, Björn Franke, Murray Cole, Michael O'Boyle, Trevor Mudge, Ronald Dreslinski (2020). HetSim: Simulating Large-Scale Heterogeneous Systems using a Trace-driven, Synchronization and Dependency-Aware Framework. In IISWC.

PDF Code Slides DOI

Subhankar Pal, Siying Feng, Dong-hyeon Park, Sung Kim, Aporva Amarnath, Chi-Sheng Yang, Xin He, Jonathan Beaumont, Kyle May, Yan Xiong, Kuba Kaszyk, John Magnus Morton, Jiawen Sun, Michael O'Boyle, Murray Cole, Chaitali Chakrabarti, David Blaauw, Hun-Seok Kim, Trevor Mudge, Ronald Dreslinski (2020). Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration. In PACT.

PDF Slides DOI

Yan Xiong, Jian Zhou, Subhankar Pal, David Blaauw, Hun-Seok Kim, Trevor Mudge, Ronald Dreslinski, Chaitali Chakrabarti (2020). Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture. In ISCAS.

PDF

Javad Bagherzadeh, Aporva Amarnath, Jielun Tan, Subhankar Pal, Ronald Dreslinski (2020). R2D3: A Reliability Engine for 3D Parallel Systems. In DAC.

PDF DOI

Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-hyeon Park, Austin Rovinski, Haojie Ye, Yuhan Chen, Ronald Dreslinski, Trevor Mudge (2020). Sparse-TPU: Adapting Systolic Arrays for Sparse Matrices. In ICS.

PDF DOI

Anuraag Soorishetty, Jian Zhou, Subhankar Pal, David Blaauw, Hun-Seok Kim, Trevor Mudge, Ronald Dreslinski, Chaitali Chakrabarti (2020). Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture. In ICASSP.

PDF DOI

Dong-hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Taylor, Trevor Mudge, David Blaauw, Hun-Seok Kim, Ronald Dreslinski (2020). A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. JSSC.

PDF DOI

Subhankar Pal, Dong-hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Taylor, Trevor Mudge, David Blaauw, Hun-Seok Kim, Ronald Dreslinski (2019). A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. In VLSI.

PDF Slides DOI

Siying Feng, Subhankar Pal, Yichen Yang, Ronald Dreslinski (2019). Parallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective. In ISPASS.

PDF Code Slides DOI

Subhankar Pal, Jonathan Beaumont, Dong-hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David Blaauw, Trevor Mudge, Ronald Dreslinski (2018). OuterSPACE: An Outer Product based Sparse Matrix Multiplication Accelerator. In HPCA.

PDF Slides DOI

Aporva Amarnath, Subhankar Pal, Siying Feng, Tutu Ajayi, Austin Rovinski, Ronald Dreslinski (2017). A Carbon Nanotube Transistor based RISC-V Processor using Pass Transistor Logic. In ISLPED.

PDF Slides DOI

Subhankar Pal, Chetan Vudadha, Sai Phaneendra Parlapalli, Sreehari Veeramachaneni, Srinivas Mandalika (2014). A New Design of an N-Bit Reversible Arithmetic Logic Unit. In ISED.

PDF Poster DOI