Statistics: 9 inputs; 4 output; 19 gates; gate-level schematic

Function: The carry look-ahead (CLA) realization of the carry function is used by each of the 74X-series circuits modeled here. Given carry-in (C_n), generate (G) and propagate (P) signals, the circuit produces three carry out signals, plus two P and G signals used to cascade into another CLA block. This circuit is small enough to be modeled as a single primitive.

• 74182 ISCAS-85 netlist
• 74182 Verilog structural model
• 74182 behavioral model
• 74182 complete gate-level tests (CN, PB[3:0], GB[3:0])