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Disaggregated Memory for Expansion and Sharing in Blade Servers. K. T. Lim, J. Chang, T. N. Mudge, P. Ranganathan, S. K. Reinhardt, and T. F. Wenisch. Proc. 36th Int'l Symp. on Computer Architecture (ISCA), pp. 267-278, June 2009.
QoS Policies and Architecture for Cache/Memory in CMP Platforms. R. Iyer, L. Zhao, F. Guo, R. Illikkal, S. Makineni, D. Newell, Y. Solihin, L. Hsu, and S. Reinhardt. Proc. 2007 ACM SIGMETRICS Conf. on Measurement and Modeling of Computer Systems, June 2007.
Analysis of Hardware Prefetching Across Virtual Page Boundaries. R. G. Dreslinski, A. G. Saidi, T. N. Mudge, and S. Reinhardt. Proc. 2007 ACM Int.l Conf. on Computing Frontiers, May 2007.
PicoServer: Using 3D Stacking Technology To Enable A Compact Energy Efficient Chip Multiprocessor. T. Kgil, S. D'Souza, A. Saidi, N. Binkert, R. Dreslinski, S. Reinhardt, K. Flautner, T. Mudge. Proc. 12th Int'l Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). October 2006. pdf
Communist, Utilitarian, and Capitalist Cache Policies on CMPs: Caches as a Shared Resource. L. R. Hsu, S. K. Reinhardt, R. Iyer, S. Makineni. Proc. 15th Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT), Sept. 2006. pdf
Exploring the Cache Design Space for Large Scale CMPs. L. R. Hsu, R. Iyer, S. Makineni, S. Reinhardt, D. Newell. Proc. First Annual Workshop on Design, Architecture, and Simulation of Chip Multiprocessors (dasCMP), Nov. 2005. pdf
A Unified Compressed Memory Hierarchy. E. G. Hallnor and S. K. Reinhardt. Proc. 11th Int'l Symp. on High-Performance Computer Architecture (HPCA), pp. 201-212, February 2005. pdf
A Compressed Memory Hierarchy using an Indirect Index Cache. E. G. Hallnor and S. K. Reinhardt. Proc. 3rd Workshop on Memory Performance Issues (WMPI), June 2004. pdf An extended version appears as University of Michigan Technical Report CSE-TR-488-04, March 2004. pdf
Guided Region Prefetching: A Cooperative Hardware/Software Approach. Z. Wang, D. Burger, S. K. Reinhardt, K. S. McKinley, and C. C. Weems. Proc. 30th Int'l Symp. on Computer Architecture (ISCA), pp. 388-398, June, 2003. (Contains minor corrections relative to the version in the proceedings.) pdf
Predicting Last-Touch References under Optimal Replacement. W.-F. Lin and S. K. Reinhardt. University of Michigan Technical Report CSE-TR-447-02, January 2002. pdf
Designing a Modern Memory Hierarchy with Hardware Prefetching. W.-F. Lin, S. K. Reinhardt, and D. Burger. IEEE Transactions on Computers, 50(11):1202-1218, Nov. 2001. pdf from IEEE
Filtering Superfluous Prefetches using Density Vectors. W.-F. Lin, S. K. Reinhardt, D. Burger, and T. R. Puzak. Proc. 2001 IEEE International Conference on Computer Design, pp. 124-132, September 2001. pdf ps ps.gz
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design. W.-F. Lin, S. K. Reinhardt, and D. Burger. Proc. 7th Int'l Symp. on High-Performance Computer Architecture (HPCA), pp. 301-312, January 2001. pdf ps ps.gz
A Fully Associative Software-Managed Cache Design. E. G. Hallnor and S. K. Reinhardt. Proc. 27th Annual Int'l Symp. on Computer Architecture (ISCA), pp. 107-116, June 2000. pdf ps ps.gz
Integrated Network Interfaces for High-Bandwidth TCP/IP. N. L. Binkert, A. G. Saidi, S. K. Reinhardt. Proc. 12th Int'l Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). October 2006. pdf
Performance Analysis of System Overheads in TCP/IP Workloads. N. L. Binkert, L. R. Hsu, A. G. Saidi, R. G. Dreslinski, A. L. Schultz, and S. K. Reinhardt. Proc. 14th Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT), pp. 218-228, Sept. 2005. pdf
Analyzing NIC Overheads in Network-Intensive Workloads. N. L. Binkert, L. R. Hsu, A. G. Saidi, R. G. Dreslinski, A. L. Schultz, and S. K. Reinhardt. Eighth Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW), February 2005. pdf.
An extended version is available as University of Michigan Technical Report CSE-TR-505-04, December 2004. pdf.The Performance Potential of an Integrated Network Interface. N. L. Binkert, R. G. Dreslinski, E. G. Hallnor, L. R. Hsu, S. E. Raasch, A. L. Schultz, and S. K. Reinhardt. Proc. Advanced Networking and Communications Hardware Workshop (ANCHOR), June 2004. pdf
Server Designs for Warehouse-Computing Environments. K. Lim, P. Ranganathan, J. Chang, C. Patel, T. Mudge, and S. K. Reinhardt. IEEE Micro (Top Picks from the 2008 Computer Architecture Conferences), 29(1):41-49, Jan-Feb 2009.
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments. K. Lim, P. Ranganathan, J. Chang, C. Patel, T. Mudge, and S. Reinhardt. Proc. 35th Int'l Symp. on Computer Architecture (ISCA), pp. 315-326, June 2008. ACM DL IEEE CSDL
How to Fake 1000 Registers. D. W. Oehmke, N. L. Binkert, S. K. Reinhardt, and T. Mudge. Proc. 38th Ann. Int'l Symp. on Microarchitecture (MICRO), pp. 7-18, Nov. 2005. pdf slides (ppt)
Design and Applications of a Virtual Context Architecture. D. Oehmke, N. Binkert, S. Reinhardt, and T. Mudge. University of Michigan Technical Report CSE-TR-497-04, September 2004. pdf
A Scalable Instruction Queue Design Using Dependence Chains. S. E. Raasch, N. L. Binkert, and S. K. Reinhardt. Proc. 29th Annual Int'l Symp. on Computer Architecture (ISCA), pp. 318-329, May 2002. pdf ps ps.gz
End-to-end Performance Forecasting: Finding Bottlenecks Before They Happen. A. G. Saidi, N. L. Binkert, T. N. Mudge, and S. K. Reinhardt. Proc. 36th Int'l Symp. on Computer Architecture (ISCA), pp. 361-370, June 2009.
Full System Critical Path Analysis. A. Saidi, N. Binkert, T. N. Mudge, and S. K. Reinhardt. 2008 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2008. pdf
The M5 Simulator: Modeling Networked Systems. N. L. Binkert, R. G. Dreslinski, L. R. Hsu, K. T. Lim, A. G. Saidi, and S. K. Reinhardt. IEEE Micro, vol. 26, no. 4, pp. 52-60, Jul/Aug, 2006. pdf from IEEE
Performance Validation of Network-Intensive Workloads on a Full-System Simulator. A. G. Saidi, N. L. Binkert, L. R. Hsu, and S. K. Reinhardt. Workshop on Interaction between Operating System and Computer Architecture (IOSCA 2005), Oct. 2005. pdf
Sampling and Stability in TCP/IP Workloads. L. R. Hsu, A. G. Saidi, N. L. Binkert, and S. K. Reinhardt. Proc. First Annual Workshop on Modeling, Benchmarking, and Simulation (MoBS), pp. 68-77, June 2005. pdf
Network-Oriented Full-System Simulation using M5. N. L. Binkert, E. G. Hallnor, and S. K. Reinhardt. Sixth Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW), pp. 36-43, February 2003. pdf
Wisconsin Wind Tunnel II: A Fast, Portable Parallel Architecture Simulator. S. S. Mukherjee, S. K. Reinhardt, B. Falsafi, M. Litzkow, S. Huss-Lederman, M. D. Hill, J. R. Larus, and D. A. Wood. IEEE Concurrency, 8(4):12-20, October-December 2000.
The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. S. K. Reinhardt, M. D. Hill, J. R. Larus, A. R. Lebeck, J. C. Lewis, and D. A. Wood. Proc. ACM SIGMETRICS Conf. on Measurement & Modeling of Computer Systems, May 1993. pdf ps ps.Z ps.gz
Kernel Support for the Wisconsin Wind Tunnel. S. K. Reinhardt, B. Falsafi, and D. A. Wood. Proc. Usenix Symp. on Microkernels and Other Kernel Architectures, September 1993. ps ps.Z ps.gz
The Soft Error Problem: An Architectural Perspective. S. S. Mukherjee, J. Emer, and S. K. Reinhardt. Proc. 11th Int'l Symp. on High-Performance Computer Architecture (HPCA), February 2005. pdf
Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor. C. Weaver, J. Emer, S. S. Mukherjee, and S. K. Reinhardt. Proc. 31st Int'l Symp. on Computer Architecture (ISCA), pp. 264-275, June 2004. pdf
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. S. S. Mukherjee, C. Weaver, J. Emer, S. K. Reinhardt, and T. Austin. Proc. 36th Annual Int'l Symp. on Microarchitecture (MICRO), pp. 29-40, Dec. 2003. pdf
Detailed Design and Evaluation of Redundant Multithreading Alternatives. S. S. Mukherjee, M. Kontz, and S. K. Reinhardt. Proc. 29th Annual Int'l Symp. on Computer Architecture (ISCA), pp. 99-110, May 2002. pdf ps ps.gz
Transient Fault Detection via Simultaneous Multithreading. S. K. Reinhardt and S. S. Mukherjee. Proc. 27th Annual Int'l Symp. on Computer Architecture (ISCA), June 2000. pdf ps ps.gz
slides from ISCA talk (MS PowerPoint)
How to Fake 1000 Registers. D. W. Oehmke, N. L. Binkert, S. K. Reinhardt, and T. Mudge. Proc. 38th Ann. Int'l Symp. on Microarchitecture (MICRO), pp. 7-18, Nov. 2005. pdf slides (ppt)
The Impact of Resource Partitioning on SMT Processors. S. E. Raasch and S. K. Reinhardt. Proc. 12th Int'l Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 15-25, Sept. 2003. pdf
Detailed Design and Evaluation of Redundant Multithreading Alternatives. S. S. Mukherjee, M. Kontz, and S. K. Reinhardt. Proc. 29th Annual Int'l Symp. on Computer Architecture (ISCA), pp. 99-110, May 2002. pdf ps ps.gz
Thread-level Parallelism and Interactive Performance of Desktop Applications. K. Flautner, R. Uhlig, S. Reinhardt, and T. Mudge. Proc. 9th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS-IX), November 2000. pdf ps ps.gz
Transient Fault Detection via Simultaneous Multithreading. S. K. Reinhardt and S. S. Mukherjee. Proc. 27th Annual Int'l Symp. on Computer Architecture (ISCA), June 2000. pdf ps ps.gz
slides from ISCA talk (MS PowerPoint)Simultaneous Subordinate Microthreading (SSMT). R. S. Chappell, J. Stark, S. P. Kim, S. K. Reinhardt, and Y. N. Patt. Proc. 26th Annual Int'l Symp. on Computer Architecture (ISCA), May 1999. pdf ps ps.gz
Applications of Thread Prioritization in SMT Processors. S. E. Raasch and S. K. Reinhardt. Proc. 1999 Workshop on Multithreaded Execution And Compilation, January 1999. pdf ps ps.gz
Dynamic Leakage-Energy Management of Secondary Caches. E. G. Hallnor and S. K. Reinhardt. University of Michigan Technical Report CSE-TR-459-02, June 2002. pdf
Automatic Performance-Setting for Dynamic Voltage Scaling. K. Flautner, S. Reinhardt, and T. Mudge. Proceedings of the International Conference on Mobile Computing and Networking (MOBICOM), pp. 260-271, July 2001. pdf
Integrating Hardware and Software Concepts in a Microprocessor-Based System Design Lab. S. K. Reinhardt. Proc. 2000 Workshop on Computer Architecture Education, June 2000. pdf ps ps.gz
Hardware Support for Flexible Distributed Shared Memory. S. K. Reinhardt, R. W. Pfile, and D. A. Wood. IEEE Transactions on Computers, Vol. 47, No. 10 (Oct. 1998). pdf ps ps.gz
Decoupled Hardware Support for Distributed Shared Memory. S. K. Reinhardt, R. W. Pfile, and D. A. Wood. Proc. 23rd Annual Int'l Symp. on Computer Architecture (ISCA), May 1996. ps ps.Z ps.gz
Tempest Interface Specification. S. K. Reinhardt. UW CS TR #1267, Feb. 1995. ps ps.Z ps.gz
Application-Specific Protocols for User-Level Shared Memory. B. Falsafi, A. R. Lebeck, S. K. Reinhardt, I. Schoinas, M. D. Hill J. R. Larus, A. Rogers, and D. A. Wood. Proc. Supercomputing '94, Nov. 1994. ps ps.Z ps.gz
Fine-grain Access Control for Distributed Shared Memory. I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Proc. Sixth Int'l Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), Oct. 1994. ps ps.Z ps.gz
Tempest and Typhoon: User-Level Shared Memory. S. K. Reinhardt, J. R. Larus, and D. A. Wood. Proc. 21st Annual Int'l Symp. on Computer Architecture (ISCA), April 1994. pdf ps ps.Z ps.gz
Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors. M. D. Hill, J. R. Larus, S. K. Reinhardt, and D. A. Wood. ACM Transactions on Computer Systems (TOCS), November 1993. (A version of this paper originally appeared at ASPLOS V.) ps ps.Z ps.gz
Mechanisms for Cooperative Shared Memory. D. A. Wood, S. Chandra, B. Falsafi, M. D. Hill, J. R. Larus, A. R. Lebeck, J. C. Lewis, S. S. Mukherjee, S. Palacharla, and S. K. Reinhardt. Proc. 20th Annual Int'l Symp. on Computer Architecture (ISCA), May 1993. ps ps.Z ps.gz