Publications

Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna Das, Matthew Hicks, Yossi Oren, and Todd Austin, "ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks", In proceedings of 21st ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS, 2016). (pdf)

Salessawi Ferede Yitbarek, Tao Yang, Reetuparna Das, and Todd Austin, "Exploring specialized near-memory processing for data intensive operations", In proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE, 2016). (pdf)

Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, and Scott Mahlke, "DynaMOS: Dynamic Schedule Migration for Heterogeneous Cores", In proceedings of 48th IEEE/ACM International Symposium on Microarchitecture (MICRO, 2015). (pdf)

William Arthur, Sahil Madeka, Reetuparna Das, and Todd Austin, "Locking down insecure indirection with hardware-based control-data isolation", In proceedings of 48th IEEE/ACM International Symposium on Microarchitecture (MICRO, 2015). (pdf)

Supreet Jeloka, Reetuparna Das, Ronald Dreslinski, Trevor Mudge, and David Blaauw, "Hi-Rise: A High-Radix Switch for 3D Integeration with Single-cycle Arbitration", To appear in proceedings of 46th IEEE/ACM International Symposium on Microarchitecture (MICRO, 2014). (pdf)

Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Ronald Dreslinski, Thomas F. Wenisch, and Scott Mahlke, "Heterogeneous Microarchitectures Trump Voltage Scaling for Mobile Cores", To appear in 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT, 2014). (pdf)

Ritesh Parikh, Reetuparna Das, and Valeria Bertacco "Power-Aware NoCs through Routing and Topology Reconfiguration", To appear in Proceedings of Design Automation Conference, San Francisco (DAC, 2014). (pdf)

Supriya Rao, Supreet Jeloka, Reetuparna Das, Ronald Dreslinski, David Blaauw, and Trevor Mudge "VIX: Virtual Input Crossbars for Efficient Switch Allocation", To appear in Proceedings of Design Automation Conference, San Francisco (DAC, 2014). (pdf)

Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David Blaauw, Ronald Dreslinski, Reetuparna Das, and Trevor Mudge "Quality-of-Service for a High Radix Switch", To appear in Proceedings of Design Automation Conference, San Francisco (DAC, 2014). (pdf)

Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, and Scott Mahlke, "Trace Based Phase Prediction For Tightly-Coupled Heterogeneous Cores", In proceedings of 46th IEEE/ACM International Symposium on Microarchitecture (MICRO, 2013). (pdf)

Reetuparna Das, Satish Narayanasamy, Sudhir K. Satpathy, Ronald Dreslinski, "Catnap: Energy Proportional Multiple Network-on-Chip", In proceedings of the 40th International Symposium on Computer Architecture, Tel Aviv, Israel (ISCA, 2013). (pdf)

Nilmini Abeyratne, Reetuparna Das, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David Blaauw, and Trevor Mudge, "Scaling Towards Kilo-Core Processors with Asymmetric High Radix Topologies", In proceedings of the 19th International Symposium on High Performance Computer Architecture (HPCA, 2013). (pdf)

Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, and Mani Azimi, "Application-to-Core Mapping Policies to Reduce Memory System Interference in Multi-Core Systems", To appear in the 19th International Symposium on High Performance Computer Architecture (HPCA, 2013). (pdf)

Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald Dreslinski, Thomas F. Wenisch, and Scott Mahlke, "Composite Cores: Pushing Heterogeneity into a Core", In 45th IEEE/ACM International Symposium on Microarchitecture (MICRO, 2012). (pdf)

Ronald G. Dreslinski,Thomas Manville, Korey Sewell, Reetuparna Das, Nathaniel Pinckney, Sudhir Satpathy, David Blaauw, Dennis Sylvester and Trevor Mudge, "XPoint Cache: Scaling Existing Bus Based Coherence Protocols for 2D and 3D Many-Core Systems", The International Conference on Parallel Architectures and Compilation Techniques (PACT, 2012). (pdf)

Sudhir K. Satpathy, Reetuparna Das, Ronald Dreslinski, Trevor Mudge, Dennis Sylvester, David Blaauw, "High Radix Self-Arbitrating Switch Fabric with Multiple Arbitration Schemes and Quality of Service", In Proceedings of Design Automation Conference, San Francisco (DAC, 2012). (pdf)

Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das, "Aergia: Exploiting Packet Latency Slack in On-Chip Networks", In Proceedings of International Symposium on Computer Architecture, Saint-Malo, France (ISCA, 2010. Selected for IEEE Top Picks). (pdf)

Xiaoxia Wu, Guangyu Sun, Reetuparna Das, Yuan Xie, Jian Li, Chita R. Das, "Cost-driven 3D Integration with Interconnect Layers", In Proceedings of Design Automation Conference, Anaheim (DAC, 2010). (pdf)

Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das, "Application-Aware Prioritization Mechanisms for On-Chip Networks", International Symposium on Microarchitecture, New York City (MICRO, 2009). (pdf)

Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar Iyer, N. Vijaykrishnan, Chita R. Das, "A Case for Dynamic Frequency Tuning in On-Chip Networks", International Symposium on Microarchitecture, New York City (MICRO, 2009). (pdf)

Shekhar Srikantaiah, Reetuparna Das, Asit K. Mishra, Mahmut Kandemir, Chita R. Das. "A Case for Integrated Processor-Cache Partitioning in Chip Multiprocessors", International Conference for High Performance Computing, Networking, Storage, and Analysis, Portland, November 2009 (SC, 2009). (pdf)

Reetuparna Das, Soumya Eachempati, Asit K. Mishra, Vijaykrishnan, Chita R. Das, "Design and Evaluation of Hierarchical On-Chip Network Topologies for next generation CMPs", International Symposium on High Performance Computer Architecture, Raleigh, North Carolina (HPCA, 2009). (pdf)

Dongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, N. Vijaykrishnan, Yuan Xie , Chita R. Das, "MIRA : A Multilayered Interconnect Router Architecture", 35th International Symposium on Computer Architecture (ISCA, 2008). (pdf)

Reetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, N. Vijaykrishnan, Ravishankar Iyer, Chita R. Das, "Performance and Power Optimization through Data Compression in Network-on-Chip Architectures", International Symposium on High Performance Computer Architecture, Salt Lake City, Utah (HPCA, 2008). (pdf)

Dongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, N. Vijaykrishnan, Ravishankar Iyer, Chita R. Das, "Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects", 15th IEEE Symposium on High-Performance Interconnects Stanford University (HOT-I, 2007). (pdf)

Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, N. Vijaykrishnan, and Chita R. Das, "A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures", Proceedings of the 34rd Annual International Symposium on Computer Architecture (ISCA, 2007). (pdf)