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I'm currently working with Prof. Scott Mahlke in the
Advanced Computer Architecture Lab at the University of Michigan.
Resume available here (pdf). (Last updated
November 2008.)
Research Interests
Current Projects
- Control path optimizations/Scaling of CGRAs for future applications
- Modulo Scheduling on Coarse-grained Reconfigurable Processors.
- Development of an Architecture Description Framework to describe and
synthesize custom processors.
- Automated design of non-programmable and programmable loop accelerators.
Publications
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Edge-centric Modulo Scheduling for Coarse-Grained Reconfigurable Architectures
[ pdf ]
Hyunchul Park, Kevin Fan, Scott Mahlke, Taewook Oh, Heeseok Kim, and Hong-seok Kim.
International Conference on Parallel Architectures and Compilation Techniques (PACT),
October 2008.
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Modulo Scheduling for Highly Customized Datapaths to Increase Hardware Reusability
[ pdf ]
Kevin Fan, Hyunchul Park, Manjunath Kudlur, and Scott Mahlke.
International Symposium on Code Generation and Optimization (CGO),
April 2008.
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Increasing Hardware Efficiency with Multifunction Loop Accelerators
[ pdf ]
Kevin Fan, Manjunath Kudlur, Hyunchul Park, and Scott Mahlke.
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS),
October 2006.
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Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable Architectures.
[ pdf ]
Hyunchul Park, Kevin Fan, Manjunath Kudlur, and Scott Mahlke.
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES),
October 2006.
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Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System.
[ pdf ]
Kevin Fan, Manjunath Kudlur, Hyunchul Park, and Scott Mahlke.
38th International Symposium on Microarchitecture (MICRO),
November 2005.
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Compiler-directed Synthesis of Multifunction Loop Accelerators.
[ pdf ]
Kevin Fan, Manjunath Kudlur, Hyunchul Park, and Scott Mahlke.
Workshop on Application Specific Processors (WASP),
in conjunction with CODES+ISSS, September
2005.
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Application Specific Processing on a General Purpose Core via Transparent
Intstruction Set Customization
[ pdf ]
Nathan Clark, Manjunath Kudlur, Hyunchul Park, and Scott Mahlke.
37th International Symposium on Microarchitecture (MICRO),
December 2004.
Classes Taken
- EECS 586: Design and Analysis of Algorithms
- EECS 570: Parallel Computer Architecture
- EECS 573: Microarchitecture
- EECS 583: Advanced Compilers
- EECS 483: Compilers
- EECS 492: Intro to Artificial Intelligence
- EECS 478: Logic Circuit Synthesis and Optimization
- EECS 427: VLSI Design I
- MATH 565: Combinatorics and Graph Theory
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