Satish Narayanasamy




Contact

CV

I am an Associate Professor in the EECS department at the University of Michigan .

For prospective students: If you are interested in my research, please send me an email with your CV.

Teaching

Software and Downloads

Research


Interests:
I work at the intersection of computer architecture, software systems and program analysis. My current interests include concurrency, security, customized architectures and tools for mobile and web applications, machine learning assisted program analysis, and tools for teaching at scale.


[Full publication list]


Selected Publications:

InvisiMem: Smart Memory Defenses for Memory Bus Side Channel
Language-Level Persistency
AsyncClock: Scalable Inference of Asynchronous Event Causality
Compute Caches

SC for GPUs
The Silently Shifting Semicolon
Accelerating Asynchronous Programs

Using Web Corpus for Program Analysis
Race Detection for Event-Driven Mobile Systems

Catnap: Energy Proportional Multiple Network-on-Chip
Parallelizing Data Race Detection

Maple: A Coverage-Driven Testing Tool for Multithreaded Programs
End-to-end Sequential Consistency
Chimera: Hybrid Program Analysis for Determinism

Surviving and detecting data races using complementary schedules
A Case for SC-Preserving Compiler
Efficient Processor Support for a Memory Model with Exceptions
DoublePlay: Parallelizing Sequential Logging and Replay
Offline Symbolic Analysis to Infer Total Store Order
MLP-aware Heterogeneous Main Memory

Tolerating Concurrency Bugs Using Transactions as Lifeguards
DRFx: A Simple and Efficient Memory Model for Concurrent Languages
Efficient Online Multi-Processor Replay on Commodity System

Offline Symbolic Analysis for Multi-Processor Replay.
Interleaving Constrained Shared-Memory Multi-Processor.
Effective Sampling for Lightweight Data Race Detection.

Benign Race Classification
Strata for recording shared memory dependencies.
Shadow Pages for TM Version Management
PinSEL -a tool for architectural simulation based on BugNet.
BugNet - a low cost system-independent program execution recorder.
Patching processor design errors

[ISCA'17]
[ISCA'17]
[ASPLOS'17]
[HPCA'17]

[MICRO'15]
[SNAPL'15]
[ISCA'15]

[OOPSLA'14]
[PLDI'14]

[ISCA'13]
[ASPLOS'13]

[OOPSLA'12]
[ISCA'12, IEEE Top Picks Award]
[PLDI'12]

[SOSP'11]
[PLDI'11]
[ASPLOS'11]
[ASPLOS'11, Best Paper Award]
[HPCA'11]
[DATE'11, Best Paper Candidate]

[MICRO'10]
[PLDI'10]
[ASPLOS'10]

[MICRO'09]
[ISCA'09]
[PLDI'09]

[PLDI'07]
[ASPLOS'06]
[ASPLOS'06]
[SIGMETRICS'06]
[ISCA'05, IEEE Micro Top Picks Award]
[ICCD'06, IEEE Micro Top Picks Award]

Graduate Students and Their Projects

Shaizeen Aga
Subarno Banerjee
Gaurav Chadha
Hossein Golestani
Chun-Hung Hsiao
Dongyoon Lee
Abhayendra Singh
Hanyun Tao
Jie Yu
Secure Cloud. Efficient and Programmable Data Parallel Systems.
Optimistic Hybrid Program Analysis for Information Flow.
Accelerators for Event-Driven Web Applications.
Performance models for interactive applications.
BigCode. Tools for Event-Driven Mobile Systems
Multiprocessor Replay
Memory Consistency Models for Concurrent Languages
Architectures for interactive applications.
Testing and Tolerating Concurrency Bugs


Graduated. Oracle Labs.

Graduated. Mesosphere start-up.
Graduated. Virginia Tech. ProQuest Dissertation Award.
Graduated. Google.

Graduated. Twitter.

Service

nsatish@umich.edu