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Recent News

Prof. Michael Flynn Elected IEEE Fellow for Contributions to Analog-Digital Interfaces
EECS News - 12/08/2014
Prof. Michael Flynn has been elected IEEE Fellow, Class of 2015, for “contributions to analog-digital interfaces.” Prof. Flynn has achieved important breakthroughs in the performance and energy efficiency of analog-digital interfaces. His research has significantly impacted three primary areas: 1) analog to digital conversion; 2) the analog-digital interface in wired and wireless communication systems; and 3) applications to complete systems, particularly brain-machine interfaces.

Flynn Presents in IEEE SSCS Distinguished Lecture Series At Georgia Tech, June 2014
IEEE SSCS Atlanta Section - 06/24/2014
"New Tricks in Analog to Digital Conversion"

New N-path filtering VCO presented by Chunyang Zhai at VLSI Symposium 2014
VLSI Symposium - 06/01/2014
A novel self-filtering scheme breaks the typical tradeoff between noise and power, enabling a ring oscillator to approach the phase noise performance of an LC oscillator.

New ring amplifier pipeline ADC structure presented by Yong Lim at ISSCC 2014
ISSCC - 02/20/2014
This work improves the power efficiency and practicality of the ring amplifier by introducing a new self-biasing scheme and by eliminating the comparators. The prototype ADC has a measured of SNDR, SNR and SFDR of 56.3dB (9.06b), 56.7dB and 67.6dB, respectively, for a Nyquist frequency input sampled at 100MS/s and consumes 2.46mW, which results in a Figure-of-Merit of 46.1fJ/conv-step.

Flynn becomes JSSC Editor-in-Chief
IEEE - 08/01/2013
Michael Flynn becomes Editor-in-Chief of the IEEE Journal of Solid State Circuits

Flynn presents plenary talk at ICECS 2012 - "Compressive sensing analog-to-digital conversion"
ICECS - 12/01/2012
Compressed sensing promises to improve the energy efficiency of sensing systems, and of wireless communication and analog-to-digital conversion. This paper reviews the concepts behind compressed sensing and surveys some recent approaches to compressed sensing in analog to digital conversion.

Fred Buhler's undergraduate research video is featured on the EECS web page
EECS web - 09/20/2012
Fred Buhler spent his summer working in with graduate students working in the area of analog and mixed signal circuits as part of the College of Engineering SURE program (Summer Undergraduate Research Experience). He had just arrived at Michigan as a transfer student the previous academic year, and wanted to get some actual research experience. In this video, he talks about saving the research group $100K in test equipment while simplifying the entire testing process. The project involved designing new boards and writing test software, as well as writing software to control instruments. Some integrated circuit design was also included in the project.

Group to present 3 papers at ASSCC
ASSCC - 09/01/2012
In November group members will present three papers at the Asia Solid-State Circuits Conference in Kobe, Japan. Jorge Pernillo will present a 1GS/s 9bit ADC. Li Li will show a novel 5GHz phase shifting PLL with record phase resolution. Mohammad Ghahramani is lead author of a novel low voltage VCO.

Ben (Hyo Gyuem) Rhew presents a wireless logarithmic closed-loop deep brain stimulation SoC at VLSI 2012
VLSI 2012 - 06/02/2012
This work introduces a logarithmic, closed-loop DBS system that detects and processes low-frequency brain field signals to control stimulation currents. A fully self-contained single-chip system includes four low-noise neural amplifier (LNA) channels, a multiplexed logarithmic ADC, two high-pass and low-pass digital logarithmic filters, a logarithmic digital signal processor (DSP) with a PI-controller, eight current stimulator channels, an RF transceiver, a clock generator, and a power harvester.

David Lin presents Spectrum-Sensing Reconfigurable Receiver at RFIC
RFIC 2012 - 06/01/2012
A flexible spectrum-sensing receiver in 65nm CMOS consists of a wideband front-end, spectrum-adaptive (SA) filtering, switched-capacitor amplifiers, and a filtering SAR ADC. The SA filter uses a DT spectrum-analyzer and a reconfigurable DT notch filter to detect and suppress large interferers over a 55MHz range. In IEEE 802.15.4 tests, the receiver exceeds sensitivity and interferer rejection requirements.

Jeff Fredenburg and Hyungil Chae present papers at ISSCC 2012
ISSCC - 11/01/2011
Two students from the group will present papers at ISSCC 2012. Both papers describe new ADC structures. A new noise shaping techniques extends the resolution of SAR ADCs and achieves a measured FoM of 35fJ/level at 10b ENOB. A new bandpass ADC demonstrates and improvement in energy efficiency of an order-of-magnitude

SPIE Newsroom Article Describes the Group's Work on Flexible Wireless Receivers
SPIE Newsroom - 05/17/2011
Advanced digital-dominant circuitry techniques enable low-power, programmable, and efficient wireless devices that can adapt to modern communication standards.

Michael Flynn Receives Education Excellence Award
EECS News - 01/20/2011
Michael Flynn conducts research in the area of mixed-signal circuit design, and is considered to be an international authority on analog to digital conversion.


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