Korey L. Sewell

Ph.D. Candidate

University of Michigan, Ann Arbor




University of Michigan, Ann Arbor, MI                                                                 April 2012

Ph.D. in Computer Science and Engineering

Thesis Title: Architecting Scalability for Many-Core Systems


University of Michigan, Ann Arbor, MI                                                                 April 2007

M.S. in Computer Science and Engineering, Concentration: Hardware Systems                 GPA: 6.641/9

Coursework: Computer Architecture, Microarchitecture, Parallel Computer Architecture


University of California at Riverside, Riverside, CA                                               June 2004

B.S. in Computer Science

Coursework: Embedded System Design, Operating Systems, Compilers, Software Engineering



Crossbar v. NoC Tradeoffs in Many-Core Systems: Designed and floor planned multi- and many-core systems (8-64 cores) for crossbar and network-on-chip topologies. Developed architectural models, simulated designs, and evaluated system tradeoffs in performance, power, and area.


Virtual Context Architectures for Multithreaded Processors: Evaluated architectures for many-threaded CPUs. Developed simulation models and analyzed results for performance and power.


The M5 Simulator: Implemented the MIPS ISA and developed CPU models (In-Order and Out-of-Order) for an open-source, full-system computer architecture simulator. http://www.gem5.org.



University of Michigan, Ann Arbor, MI                                                          September 2008 – Present

Graduate Student Research Assistant

l Researched architectures for multithreaded CPUs, many-core systems and high-radix interconnects.

l Administered the simulation pool (100+ CPUs) for the Advanced Computer Architecture Laboratory


Intel Corporation, Hillsboro, OR                                                                May 2008 – September 2008

Graduate Technical Intern

l Implemented and evaluated Last-Level Cache replacement policies for the Nehalem processor.

l Presented simulation results and analysis during architecture group meetings.


MIPS Technologies, Mountain View, CA                                                    May 2006 – December 2006

Graduate Technical Intern

l Implemented and validated the MIPS ISA for an in-house version of the M5 simulator.

l Developed a flexible pipeline simulation model used for architectural exploration.



Languages: C/C++, Verilog, MySQL, Python, Shell Scripting, LaTek, HTML, JavaScript


Applications: M5/gem5, Altera HDL, OAR, Emacs, Microsoft Office


Environments: Linux (Ubuntu/Red Hat), Mac OS, Windows



University of Michigan - Rackham Engineering Award, 2005

University of Michigan - Rackham Merit Fellow, 2004

University of California - L.E.A.D.S. Scholar, 2001 – 2003



SMES-G  (Society of Minority Engineers and Scientists-Graduate) Vice-President – 2005

NSBE (National Society of Black Engineers) Regional Academic Excellence Chair – 2004

NSBE Chapter President, U.C. Riverside - 2003



A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least recently granted priority and quality of service arbitration in 45nm CMOS. Sudhir Satpathy, Korey Sewell, Thomas Manville, Yen-Po Chen, Ronald Dreslinski, Dennis Sylvester, Trevor Mudge, David Blaauw. ISSCC 2012.


The gem5 Simulator. Nathan Binkert, Bradford Beckmann, Gabriel Black, Steven K. Reinhardt, Ali Saidi, Arkaprava Basu, Joel Hestness, Derek R. Hower, Tushar Krishna, Somayeh Sardashti, Rathijit Sen, Korey Sewell, Muhammad Shoaib, Nilay Vaish, Mark D. Hill, and David A. Wood. Computer Architecture News (CAN), June 2011.


Extreme Virtual Pipelining (XVP): Moving Towards Scalable Multithreaded Processors. Korey Sewell, Trevor Mudge, and Steve Reinhardt. Architectural Support for Programming Languages and Operating Systems (ASPLOS) XIV Conference - Wild & Crazy Ideas Session, March 2010.



University of Michigan, College of Engineering                                                                        Fall 2010

Lecturer, Course: Introduction to Logic Design


University of Michigan, Minority Engineering Programs Office                                Fall 2007 - Present     

Summer Programs Instructor, Workshop Leader, Tutor, Topic: C++/Matlab Programming


Capella University (Online)                                                                               Fall 2008 – Winter 2009

Adjunct Faculty, Course: Introduction to Software Engineering


University of Michigan, EECS Department                                                                           Winter 2008

Graduate Student Instructor, Course: Introduction to Logic Design