Department of Electrical Engineering and Computer Science
Computer Science and Engineering Division
Beyster Bldg. Room 4713
University of Michigan
2260 Hayward Street
Ann Arbor, MI 48109-2121, USA
Telephone: +1 (734) 763-0386
Fax: +1 (734) 763-4617
John P. Hayes is a professor in the EECS Department at the University of Michigan, where he holds the endowed Claude E. Shannon Chair of Engineering Science. Prior to that he was on the faculty of the University of Southern California. He also worked in industry for a couple of years, and has held visiting positions at Stanford University, McGill University, the University of Montreal, Logicvision Inc., the University of Freiburg, and the University of Passau. Professor Hayes teaches and conducts research in the general area of computer science and engineering, with specific interests in computer-aided design, verification and testing of VLSI circuits; reliable computer architecture; neural networks; and unconventional computing techniques such as neural and quantum computing. He was the founding director of Michigan's Advanced Computer Architecture Laboratory, now called the Computer Engineering Laboratory. He is author of seven books, including Computer Architecture and Organization, (McGraw-Hill, 3rd ed. 1998), Quantum Circuit Simulation (Springer, 2009), and Design, Analysis and Test of Logic Circuits under Uncertainty (Springer, 2012), as well as over 300 technical papers and several patents. He obtained his B.E. degree in electrical engineering from the National University of Ireland, Dublin, and his M.S. and Ph.D. degrees from the University of Illinois at Urbana-Champaign. He received the University of Michigan's Distinguished Faculty Award in 1999, and the Alexander von Humboldt Foundation's Research Prize in 2004. In 2013 he received a Lifetime Contribution Medal from IEEE for outstanding contributions to test technology in 2013, while he was the recipient of the ACM SIGDA Pioneering Achievement Award for contributions to logic design, fault tolerant computing, and testing in 2014. Professor Hayes is a Fellow of both IEEE and ACM.
Areas of Interest: Our group is currently conducting research related to the following topics:
* Techniques and CAD tools for designing, verifying and testing VLSI circuits
* Computer architecture, especially for high-reliability applications
* Probabilistic aspects of conventional, stochastic and quantum computation
* Computing principles underlying natural and artificial neural networks
For more information on the group's research interests, see Selected Publications below.
Research Assistantships: Openings for graduate student research assistants (RAs) are available from time to time. There is currently an RA opening in the area of neural networks and stochastic computing.
RA applicants should apply to (or be already admitted into) one of the EECS Department's PhD programs, normally Computer Science and Engineering (CSE) in the Computer Hardware track, and send me an e-mail message with a copy of his/her detailed CV. For information about Michigan's various graduate programs in EECS, including admission requirements, application procedures, deadlines, etc., go to the EECS Graduate Admissions web site.
Financial Aid: This is available in the form of fellowships, research assistantships, and teaching assistantships. New students are admitted at two levels, MS and PhD, depending on their qualifications. Students entering with a BS degree may be admitted at either level; however, only those with outstanding qualifications are admitted at the PhD level. Such students will normally obtain an MS from Michigan en route to the PhD degree. Applicants who already have an MS degree in a relevant area can only be admitted at the PhD level.
An exceptionally attractive feature of our program is that students admitted at the PhD level are guaranteed full financial support throughout their MS/PhD studies, as long as they are making satisfactory progress. PhD-bound students are typically supported as fellows or RAs in their first year, and as RAs or teaching assistants in later years. Admission at the MS level does not normally include financial aid. It should be noted that admission to the PhD level is extremely competitive. Those who are admitted typically have excellent GPA and GRE scores, rank near the top of their graduating class at a highly-ranked university, and have strong and credible letters of support that document their specific accomplishments, including (where applicable) academic achievements, publications, industrial experience, and PhD research potential.
Internships: Unfortunately, I cannot provide summer internships for
undergraduate students from other universities, and applications for such
internships will be discarded.
Benchmark Circuits: For information about the high-level versions of the ISCAS logic circuits that we developed circa 1996, go to the benchmark website. The site is no longer maintained, and all the data we have available concerning the benchmarks is at that website, and publically available. What may appear to be missing links refer to non-existent data.
QuIDDPro Simulator: QuIDDPro is a fast, scalable, and easy-to-use computational interface for generic quantum circuit simulation. It supports state vectors, density matrices, and related operations using the Quantum Information Decision Diagram (QuIDD) which we developed. The book Quantum Circuit Simulation published by Springer in 2009, and available at amazon.com, contains the QuIDDPro manual and describes the algorithms used by QuIDDPro. For further information, including how to access the software, click here.
Winter 2014: EECS 270: Introduction to logic design
Fall 2014: EECS 478: Logic circuit synthesis and optimization
Winter 2015: EECS 579: Digital system testing
Fall 2015: EECS 478: Logic circuit synthesis and optimization
Winter 2016: EECS 478: Logic circuit synthesis and optimization
2. I. Polian, J.P. Hayes, S.M. Reddy and B. Becker: Modeling and mitigating transient errors in logic circuits, IEEE Trans. on Dependable & Secure Computing, pp.537-547, July-Aug. 2011. Transient or soft errors caused by environmental effects are a growing concern in micro- and nanoelectronics. This paper presents a novel framework for modeling and mitigating the effects of such errors in digital circuits. (pdf)
3. K.M. Zick and J.P. Hayes: Low-cost sensing with ring oscillator arrays for healthier reconfigurable systems, ACM Trans. Reconfig. Technology & Systems, vol. 5, no. 1, pp.3:1-3:26, March 2012. ICs increasingly suffer from component variation, voltage noise, thermal hotspots, and other subtle physical phenomena. Systems with reconfigurability have unique opportunities for adapting to such effects. Required, however, are low-cost, fine-grained methods for sensing physical parameters. This article presents powerful, novel approaches to online sensing, which can enable systems to autonomously uncover a wealth of physical information. (pdf)
4. A. Alaghi, C. Li and J.P. Hayes: Stochastic circuits for real-time image-processing applications, Proc. 50th Design Automation Conf. (DAC), article 136, 6 pages, June 2013. This work addresses the design of image-processing circuits using stochastic computing techniques. We show how stochastic circuits can be integrated at the pixel level with image sensors to support efficient real-time pre-processing of images. Applications of interest include retinal implants for vision restoration and on-the-fly feature extraction. (pdf)
5. J.P. Hayes: Introduction to stochastic computing and its challenges, Proc. 52nd Design Automation Conf. (DAC), article 59, 3 pages, June 2015. Stochastic computing (SC) is an unconventional technique which processes data in the form of bit-streams that resemble neural spike trains, and can be interpreted as probabilities. It can implement complex arithmetic operations by means of simple logic circuits. This allows SC circuits to be used in massively parallel or extremely low-power applications. Another interesting property of SC is that it is very tolerant of errors of the soft, bit-flip type. (pdf)
Graduated 2010. PhD thesis title: Physically-adaptive computing via introspection and self-optimization in reconfigurable systems.
Current position: USC Information Sciences Institute, Arlington, VA.
Dae Young Lee
Graduated 2012. PhD thesis title: Wireless testing of integrated circuits.
Current position: Samsung Research, Seoul, Korea.
Graduated 2012. PhD thesis title: Probabilistic methods for analyzing and simulating digital circuits.
Current position: Oracle Inc., Burlington, MA.
Graduated 2015. PhD thesis title: The logic of random pulses: stochastic computing.
Current position: University of Washington, Seattle, WA.
Ayee Goundan, Thirumalai Sridhar, John P. Shen, Raif M. Yanney, M. S. Krishnan, Younggap You, Debashis Bhattacharya, Shantanu Dutt, Robert L. Maziasz, T. C. Lee, Ram Raghavan, Brian T. Murray, R. D. (Shawn) Blanton, Hung-Kuei Ku, Michael J. Batek, Krishnendu Chakrabarty, Mark Hansen, Avaneendra Gupta, Amit Chowdhary, Hakan Yalcin, Hussain Al-Asaad, Hyungwon (Will) Kim, Joonhwan Yi, Nagarajan Kandasamy, Feng Gao, Rajesh Venkatasubramanian, Jia-yi Chen, George Viamontes, Smita Krishnaswamy, and Sungsoon Cho.
Updated January 2016