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Farima Fatahi Bayat

Graduate Research Assistant

About Me

I am a second-year Ph.D. student in the Computer Science and Engineering Department at the University of Michigan. I work as a Research Assistant with Prof. H. V. Jagadish . I have recently developed an Open Information Extraction system (CompactIE) that extracts compact fine-grained triples from raw text. Currently, I am extending this system to capture high-order relations between CompactIE extractions using a nested representation.

Research Interests: Data Mining, Information Extraction, Question Answering systems, Graph Neural Networks, Knowledge Graphs, and Machine Learning

Research Experience


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CompactIE: Compact Facts in Open Information Extraction

Database Research Group | June 2020 – Present

In this work we extract compact triples from single sentences using an end-to-end pipelined approach that first extracts triple constituents using a novel table filling model and then links them with a classifier. One application of this system is creating concept maps.

Inspired by NestIE system, we aim to extend this work to capture the complete meaning of a sentence by connecting compact extractions produced by CompactIE.

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Analyzing the Relation between Product Features and Consumer Preferences

GEMS LAB | November 2019 – December 2020

A multi-modal recommendation system that exploits novel text and graph embedding techniques to infer consumer interests and preferences and make product recommendations.

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>Hardware-aware Learning for the Efficient Implementation of Convolutional Neural Networks

NoC LAB | September 2017 – August 2018

Extending the Ristretto tool to optimize neural network weights for hardware implementation of an object recognition system.

Paper Code

Notable Academic Projects

a COVID-19 X-Ray Image Classification Using Transfer Learning and Contrastive Learning

Development of a decision fusion model that jointly exploits transfer learning (three pre-trained CNN models) and contrastive learning (Siamese Neural network) techniques to detect the existence of COVID-19 virus in patients' lungs from chest X-ray images.

Technologies used:
  • Pytorch
  • Jupyter Notebook
  • Google Colab

GitHub

Conversation Entailment

Development of a BERT-based encoder-decoder model that predicts whether a hypothesis sentence entails a conversational premise. Conversational premise is a script of multiple turn-taking dialogues between two agents.

Technologies used:
  • Pytorch/ Hugging Face
  • Jupyter Notebook
  • Google Colab

Github

Part-of-Speech (POS) Taggers

Implementation of two Part-of-Speech tagging systems: one is based on the first-order Hidden Markov Model which uses Viterbi algorithm to assign POS tags to words, and another that is based on the popular encoder-decoder models which uses BiLSTM as it's encoder and a softmax layer as it's decoder.

Neural Layer Implementation

Implementation of the forward and backward pass of the following neural network layers from scratch: (temporal/regular) fully-connected layer, ReLU, convolutional layer, softmax loss layer, and max-pooling layer. The implemented layers has then been combined to build image classification and image captioning models.

CKY parser

Implementing a Cocke–Younger–Kasami parsing algorithm to generate phrases based on context-free grammars.

Atalk (Course-defined Programming Language) Compiler

a compiler for Asynchronous Talk (ATalk), an actor-oriented programming language in which actors are concurrent entities with one execution thread and one mailbox.

Technologies used:
  • ANother Tool for Language Recognition (ANTLR)
  • Java
  • SPIM MIPS Processor Simulator

Parallelized Fully-connected Neural Network

Utilizing the multi-threading and synchronization structures of C++ to implement a parallelized fully-connected Neural Network.

Design and Implementation of 16-bit MIPS Processor with 2-way L1 Cache

a 5-stage pipeline custom MIPS core with static branch prediction, 5 cycle memory access, 2-way L1 cache with 1-bit LRU, and full forwarding.

Technologies used:
  • Verilog Hardware Description Language
  • Quartus II
  • SignalTap II Logic Analyzer
  • Altera DE2-115 Development and Education Board Altera Cyclone IV FPGA logic

Design and Implementation of a Neural Network Accelerator

Technologies used:
  • Verilog Hardware Description Language
  • ISE Design Suite
  • Xilinx FPGA

Work Experience

Data Engineeer Intern - Digikala Summer 2019

Customer Purchase Probability: a framework that estimates the probability of purchase by the user in the current session by monitoring customer’s recent behavior.

Technologies used:
  • Python
  • SQL
  • Apache Kudu
  • Redis

Teaching Assistantship

Operating Systems, Fall 2017 - Fall 2018, University of Tehran, Iran

Instructor: Mehdi Kargahi

Computer-Aided Digital System Design, Fall 2017 - Fall 2018, University of Tehran, Iran

Instructor: Mehdi Modarressi

Computer Architecture/ Computer Architecture Lab, Fall 2017 - Fall 2018, University of Tehran, Iran

Instructor: Saeid Safari

Computer Networks, Winter 2018 - Fall 2018, University of Tehran, Iran

Instructor: Ahmad Khonsari

Awards

2018: Second-Best B.Sc. Thesis Award, University of Tehran

2018: Received scholarship from Faculty of Engineering as an exceptional talent student

2018: Ranked 5th in Class of 2014, Hardware Group, University of Tehran