I am a hardware developer at IBM, working in the functional verification team for POWER processors. I received a PhD degree in the Computer Science and Engineering program from the University of Michigan. My research advisor was Valeria Bertacco. Also, I received my bachelor's degree and master's degree both from Seoul National University, South Korea. Here is my CV.

Computer architecture and hardware verification
· Robust memory subsystem and network-on-chip designs
· Microprocessor post-silicon validation

• "Low-Overhead Microarchitectural Patching for Multicore Memory Subsystems"
Doowon Lee, Opeoluwa Matthews and Valeria Bertacco
International Conference on Computer Design (ICCD), 2018. Paper Slides

• "MTraceCheck: Validating Non-Deterministic Behavior of Memory Consistency Models in Post-Silicon Validation"
Doowon Lee and Valeria Bertacco
International Symposium on Computer Architecture (ISCA), 2017. Paper Slides GitHub

• "AGARSoC: Automated Test and Coverage-Model Generation for Verification of Accelerator-Rich SoCs"
Biruk Mammo, Doowon Lee, Harrison Davis, Yijun Hou and Valeria Bertacco
Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. Paper Slides

• "Probabilistic Bug-Masking Analysis for Post-Silicon Tests in Microprocessor Verification"
Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv and Valeria Bertacco
Design Automation Conference (DAC), 2016. Paper Slides

• "NoCVision: A Network-on-Chip Dynamic Visualization Solution"
Vaibhav Gogte, Doowon Lee, Ritesh Parikh and Valeria Bertacco
Workshop on Network on Chip Architectures (NoCArc), 2015. Paper Slides

• "Highly Fault-tolerant NoC Routing with Application-aware Congestion Management"
Doowon Lee, Ritesh Parikh and Valeria Bertacco
Symposium on Networks-on-Chip (NOCS), 2015. Paper Slides

• "Brisk and Limited-Impact NoC Routing Reconfiguration"
Doowon Lee, Ritesh Parikh and Valeria Bertacco
Design, Automation & Test in Europe (DATE), 2014. Paper Slides

• "Hybrid Checking for Microarchitectural Validation of Microprocessor Designs on Acceleration Platforms"
Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv and Valeria Bertacco
International Conference on Computer-Aided Design (ICCAD), 2013. Paper

• "VLSI Implementation of a VC-1 Main Profile Decoder for HD Video Applications"
Jinhyun Cho, Doowon Lee, Sangyong Yoon, Sanggyu Park and Soo-Ik Chae
IEICE transactions on fundamentals of electronics, communications and computer sciences, E92-A(1), 2009. Paper

• "A Hybrid Verification Methodology for SoCBase-DE Design Flow"
Jinhyun Cho, Doowon Lee, Sanggyu Park and Soo-Ik Chae
The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2007. Paper

Email: doowon@umich.edu
Office: #2765 BBB Building, 2260 Hayward St., Ann Arbor, MI 48109-2121, USA