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Abstract State Machines

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DLX (early version)

Citation: Egon Börger and S. Mazzanti, "A correctness proof for pipelining in RISC architectures," DIMACS Technical Report 96-22, July 1996.
Summary: An early version of a specification and proof of correctness of pipelining in the Hennesseey and Patterson DLX processor.
Subjects: Architectures, Hardware, Verification
Download: PostScript, PDF, Compressed PostScript.
Notes: See the final version of the paper.
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Jim Huggins / huggins@acm.org
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[an error occurred while processing this directive] URL: http://web.eecs.umich.edu/gasm/papers/dlxtr.html (page only)
last update: Wednesday, 14-Aug-2013 18:19:19 EDT