University of Michigan
Electrical & Computer Engineering
1301 Beal Ave., 2417C EECS
Ann Arbor, MI 48109
Tel: 734 763 4526
Fax: 734 763-4617
Low Power Digital Circuits, Interconnect Fabrics and Memory Design.
- Scalable, energy-efficient interconnect fabric with built-in arbitration protocols is required for Exa-scale computing. My research involves designing 3D topolgies for switches, to decrease the interconnect fabric's area, power and latency while still maintaining the fairness and bandwidth.
- Configurable memory including content addressable memory and memory based computing.
- Low power non-volatile memory design