EECS 270: Introduction to Logic Design

Prof. Janice M. Jenkins and Prof. Pinaki Mazumder

E-mail: {jenkins, digital}@eecs.umich.edu, Ph: 734-763-2107
Office Hours: M, W, F => 9:30-10:30 and 2:00-3:00

General Information

Course Description: Binary and non-binary systems, Boolean algebra digital design techniques, logic gates, logic minimization, standard combinational circuits, sequential circuits, flip-flops, synthesis of synchronous sequential circuits, PLAs, ROMs, RAMs, arithmetic circuits, computer-aided design. Laboratory includes hardware design and CAD experiments.

Detailed Course Description(pdf)
Class Schedule(Excel)

Announcement

Homework

Homework Assignment #1: Due date: September 18, 2000
Homework Assignment #2: Due date: September 25, 2000
Homework Assignment #3: Due date: October 2, 2000

Lab Assignments

Lab Overview
Lab #1: Date: September 11-15, 2000
Lab #2: Date: September 25-29, 2000
Lab #3: Date: October 2-6, 2000
Lab #4: Date: October 16-20, 2000
Lab #5: Date: October 30 - November 3, 2000
Lab #6: Date: November 6-10, 2000
Lab #7: Date: November 20-23, 2000