JOHN P. HAYES
Professor Emeritus of Electrical Engineering and Computer Science and
Claude E. Shannon Professor Emeritus of Engineering Science
Department of Electrical Engineering and Computer Science
Computer Science and Engineering Division
University of Michigan
2260 Hayward Street
Ann Arbor, MI 48109-2121, USA
E-mail: jhayes@umich.edu
Biography
John P. Hayes is professor emeritus in the EECS Department at the University of Michigan, where he also holds the Claude E. Shannon Chair of Engineering Science. Before coming to Michigan, he was on the faculty of the University of Southern California for ten years. He also worked in industry for a couple of years, and has held short visiting positions at Stanford University, McGill University, the University of Montreal, Logicvision Inc., the University of Freiburg, and the University of Passau. His teaching and research interests are in the general area of computer science and engineering, with specific interests in computer-aided design, verification and testing of VLSI circuits, unconventional computing techniques such as neural networks and machine learning, as well as stochastic and quantum computing. Professor Hayes was the founding director of Michigan's Advanced Computer Architecture Laboratory, now the Computer Engineering Laboratory. He is the author of seven books, including Computer Architecture and Organization, (McGraw-Hill, 3rd ed. 1998), Quantum Circuit Simulation (Springer, 2009), and Design, Analysis and Test of Logic Circuits under Uncertainty (Springer, 2012), as well as over 350 technical papers and several patents. He obtained his B.E. degree in electrical engineering from the National University of Ireland, Dublin, and his M.S. and Ph.D. degrees from the University of Illinois at Urbana-Champaign. He received the University of Michigan's Distinguished Faculty Award in 1999, and the Alexander von Humboldt Foundation's Research Prize in 2004. In 2013 he was awarded a Lifetime Contribution Medal from IEEE for outstanding contributions to test technology. He was the recipient of the ACM SIGDA Pioneering Achievement Award for contributions to logic design, fault tolerant computing, and testing in 2014. Professor Hayes is a Fellow of both IEEE and ACM.
Research
I continue to pursue research into unconventional and emerging computing technologies with collaborators at the University of Michigan and the University of Stuttgart. One such technology is stochastic computing, where data are represented by pseudo-random or probabilistic bit-streams, and numerical operations can be implemented by extremely low-cost circuits, e.g., a single AND gate can perform multiplication. Another topic of interest is quantum computing, in which probabilistic behavior is also central. Quantum computers may eventually lead to vast improvements in computing performance. My work addresses the underlying principles of these technologies and their potential application to neural network design, as well as to natural and artificial intelligence.
Publications
Books
1. Computer Architecture and Organization, McGraw-Hill, New York, 1978. Chinese-language edition Shanghai, 1982. Second Edition, McGraw-Hill, New York, 1988. Korean-language edition, Seoul, 1996. Chinese-language edition, Taiwan, 1995. Third Edition, McGraw-Hill, New York, 1998. Korean-language edition, Seoul, 2000.
2. Digital System Design and Microprocessors, McGraw-Hill, New York, 1984. Spanish-language edition: Diseno de Sistemas Digitales y Microprocesadores, Madrid, 1986.
3. Hierarchical Modeling for VLSI Circuit Testing, (with D. Bhattacharya), Kluwer Academic Publishers, Boston, 1990.
4. Layout Minimization of CMOS Cells, (with R. L. Maziasz), Kluwer Academic Publishers, Boston, 1992.
5. Introduction to Digital Logic Design, Addison-Wesley, Reading, MA, 1993. Chinese-language edition, Taiwan, 1994. Spanish-language edition: Introduccion al Diseno Logico Digital, Addison-Wesley Iberoamericana, 1996.
6. Quantum Circuit Simulation, (with G.F. Viamontes and I.L. Markov), Springer, New York, 2009.
7. Design, Analysis and Test of Logic Circuits under Uncertainty, (with S. Krishnaswamy and I.L. Markov), Springer, New York, 2012.
Papers
For a fairly complete list of refereed publications, go to Google Scholar.
Courses Taught
EECS 100: Introduction to computing science
EECS 203: Discrete mathematics
EECS 270: Introduction to logic design
EECS 470: Introduction to computer architecture
EECS 478: Logic circuit synthesis and optimization
EECS 577: Reliable computing systems
EECS 579: Digital system testing
EECS 598: Quantum computing circuits
EECS 627: VLSI design II
Former PhD Students
University of Southern California
1. Ayee Goundan, graduated 1978. Thesis title: Fault equivalence in logic networks. Recent position: Atheros Communications India [retired], Chennai, India.
2. Thirumalai Sridhar, graduated 1981. Thesis title: Easily testable bit-sliced digital systems. Recent position: Broadcom Inc., CA.
3. John P. Shen, graduated 1981. Thesis title: Fault tolerance of b-networks in interconnected multi-computer systems. Recent position: Professor, Carnegie-Mellon University, Silicon Valley Campus.
4. Raif M. Yanney, graduated 1982. Thesis title: Fault recovery in multiprocessor networks. Recent position: Independent Consultant, Los Angeles, CA.
5. Musaravakkam S. Krishnan, graduated 1984. Thesis title: A structured layout design methodology for VLSI circuits. Recent position: Intel Corp., Cupertino, CA
University of Michigan
6. Younggap You, graduated 1986. Thesis title: Self-testing VLSI circuits. Recent position: Professor [retired], Chungbuk National University, Cheongju, South Korea.
7. Debashis Bhattacharya, graduated 1988. Thesis title: Hierarchical modeling and test generation for digital circuits. Recent position: Futurewei Technologies Inc., Plano, TX.
8. Shantanu Dutt, graduated 1990. Thesis title: Designing and reconfiguring fault-tolerant multiprocessor systems. Recent position: Professor, University of Illinois, Chicago, IL.
9. Robert L. Maziasz, graduated 1990. Thesis title: Exact layout area minimization of CMOS functional cells. Recent position: NXP USA Inc., Austin, TX.
10. Tse Chiang Lee, graduated 1990. Thesis title: Design of fault-tolerant hypercube computers. Recent position: Chung Cheng Medical Equipment Ltd., Taipei, Taiwan.
11. Ram Raghavan, graduated 1991. Thesis title: Memory architectures for vector processing. Recent position: IBM System & Technology Group [retired], Austin, TX.
12. Brian T. Murray, graduated 1994. Thesis title: Hierarchical testing using precomputed tests for modules. Recent position: Luminar Technologies, Detroit, MI.
13. Ronald D. (Shawn) Blanton, graduated 1995. Thesis title: Design and testing of regular circuits. Recent position: Professor, Carnegie Mellon University, Pittsburgh, PA.
14. Hung-Kuei Ku, graduated 1995. Thesis title: Fault-tolerant interconnection networks for multi-processors. Recent position: AT&T Laboratories, Middletown, NJ.
15. Michael J. Batek, graduated 1995. Thesis title: Test-driven transformations in logic design. Recent position: Broadcom Inc., San Jose, CA.
16. Krishnendu Chakrabarty, graduated 1995. Thesis title: Test response compaction for built-in self testing. Recent position: Professor, Arizona State University, Phoenix, AZ.
17. Mark C. Hansen, graduated 1996. Thesis title: Symbolic functional test generation with guaranteed low-level fault detection. Recent position: Delphi Technologies Inc., Kokomo, IN.
18. Avaneendra (Avi) Gupta, graduated 1997. Thesis title: Integer-programming-based layout synthesis of two- dimensional CMOS cells. Recent position: Bubble Insurance, Cupertino, CA.
19. Hakan Yalcin, graduated 1997. Thesis title: Hierarchical timing analysis of digital circuits. Recent position: Cadence Design Systems, San Jose, CA.
20. Amit Chowdhary, graduated 1997. Thesis title: Technology mapping for field-programmable gate arrays. Recent position: Intel Corp., Santa Clara, CA.
21. Hussain S. Al-Asaad, graduated 1998. Thesis title: Lifetime validation of digital systems via fault modeling and test generation. Recent position: Associate Professor, Univ. of California, Davis.
22. HyungWon Kim, graduated 1999. Thesis title: Testing and synthesis of systems-on-a-chip with unimplemented blocks. Recent position: Professor, Chungbuk National University, Cheongju, South Korea.
23. Joonhwan Yi, graduated 2002. Thesis title: High-level functional and delay testing for digital circuits. Recent position: Professor, Kwangwoon University, Seoul, South Korea.
24. Nagarajan Kandasamy, graduated 2003. Thesis title: Design of low-cost dependable systems for distributed embedded applications. Recent position: Professor, Drexel University, Philadelphia, PA.
25. Rajesh Venkatasubramanian, graduated 2005. Thesis title: Fault tolerance in mobile embedded computer networks. Recent position: VMware Inc., Palo Alto, CA.
26. Feng Gao, graduated 2005. Thesis title: Gate-level techniques for low power and reliable circuit design. Recent position: Nvidea Corp., Boston, MA.
27. Jia-yi Chen, graduated 2006 (co-advised with M. P. Flynn). Thesis title: Design of low-power super- regenerative receivers. Recent position: Google, San Jose, CA.
28. George Viamontes, graduated 2006 (co-advised with I. L. Markov). Thesis title: Efficient quantum circuit simulation. Recent position: Kapoq, Chicago, IL.
29. Smita Krishnaswamy, graduated 2008 (co-advised with I. L. Markov). Thesis title: Design, analysis, and test of logic circuits under uncertainty. Winner of the 2009 Ph.D. Dissertation Award of the European Design and Automation Association (EDAA). Recent position: Associate Professor of Genetics and Computer Science, Yale University, New Haven, CT.
30. Sungsoon Cho, graduated 2009. Thesis title: Adaptive management schemes for mobile ad hoc networks. Recent position: Google,Mountain View, CA.
31. Kenneth M. Zick, graduated 2010 (co-advised with J.H. Holland). Thesis title: Physically-adaptive computing via introspection and self-optimization in reconfigurable systems. Recent position: USC Information Sciences Institute (ISI), Arlington, VA.
32. Dae Young Lee, graduated 2012 (co-advised with D.D. Wentzloff). Thesis title: Wireless testing of integrated circuits. Recent position: Samsung, South Korea.
33. Chien-Chih Yu, graduated 2012. Thesis title: Probabilistic methods for analyzing and simulating digital circuits. Recent position: Waymo, Mountain View, CA.
34. Armin Alaghi, graduated 2015. Thesis title: The logic of random pulses: stochastic computing. Recent position: Facebook Reality Labs and University of Washington, Seattle, WA.
35. Te-Hsuan (Sean) Chen, graduated 2016. Thesis title: Designing accurate and low-cost stochastic circuits. Recent position: Xilinx, San Jose, CA.
36. Paishun Ting, graduated 2019. Thesis title: Design of sequential stochastic computing systems. Recent position: Microsoft Research, Bellevue, WA.
37. Fang Zhang, graduated 2020 (co-advised with Y. Shi). Thesis title: A parallel tensor network contraction algorithm and its applications in quantum computation. Recent position: Alibaba, Seattle, WA.
38. Timothy J. Baker, graduated 2023. Thesis title: A statistical approach to stochastic computing design and analysis. Recent position: Eikon Therapeutics, Mountain View, CA.
Updated March 2025
